JPS576940A - Information transfer system - Google Patents
Information transfer systemInfo
- Publication number
- JPS576940A JPS576940A JP8022280A JP8022280A JPS576940A JP S576940 A JPS576940 A JP S576940A JP 8022280 A JP8022280 A JP 8022280A JP 8022280 A JP8022280 A JP 8022280A JP S576940 A JPS576940 A JP S576940A
- Authority
- JP
- Japan
- Prior art keywords
- signals
- register
- parallel
- control signals
- series
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/45—Transmitting circuits; Receiving circuits using electronic distributors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Communication Control (AREA)
Abstract
PURPOSE:To realize a highly efficient transfer of information with a high speed of conversion, by changing the signals to be transmitted when the parallel control signals to be transferred are reversed into the series signals through parallel-series conversion. CONSTITUTION:A code inversion time is detected through a control signal inversion detecting circuit 20 and at a transmitter side device for each of parallel input control signals a-c. One of these control signals is applied to a transmission frame producing circuit 21 in the form of a sampling pulse (h), and other control signals are applied to a register 22. At the same time, parallel control signals a-c applied to the register 22 plus data (d) are sampled through the register 22 and with the sampling pulse and then applied to a shift register 23. the circuit 21 delivers a frame for transmission to the register 23 by the sampling pulse. The register 23 changes the sampled input signals a-d into the series signals from the parallel signals by the transmission frame to be transmitted to a transmission line 29 from a transmitting circuit 24 in the form of a series signal (i).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8022280A JPS576940A (en) | 1980-06-16 | 1980-06-16 | Information transfer system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8022280A JPS576940A (en) | 1980-06-16 | 1980-06-16 | Information transfer system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS576940A true JPS576940A (en) | 1982-01-13 |
Family
ID=13712332
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8022280A Pending JPS576940A (en) | 1980-06-16 | 1980-06-16 | Information transfer system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS576940A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6127950A (en) * | 1998-02-16 | 2000-10-03 | Matsushita Electric Industrial Co., Ltd. | Transmission circuit and reception circuit |
-
1980
- 1980-06-16 JP JP8022280A patent/JPS576940A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6127950A (en) * | 1998-02-16 | 2000-10-03 | Matsushita Electric Industrial Co., Ltd. | Transmission circuit and reception circuit |
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