JPS5765021A - Dynamic frequency division circuit - Google Patents
Dynamic frequency division circuitInfo
- Publication number
- JPS5765021A JPS5765021A JP55141466A JP14146680A JPS5765021A JP S5765021 A JPS5765021 A JP S5765021A JP 55141466 A JP55141466 A JP 55141466A JP 14146680 A JP14146680 A JP 14146680A JP S5765021 A JPS5765021 A JP S5765021A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- circuit
- frequency division
- dynamic frequency
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G19/00—Electric power supply circuits specially adapted for use in electronic time-pieces
- G04G19/02—Conversion or regulation of current or voltage
- G04G19/06—Regulation
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Electromechanical Clocks (AREA)
- Oscillators With Electromechanical Resonators (AREA)
- Electric Clocks (AREA)
Abstract
PURPOSE:To perform normal frequency division all times, by providing a constant power supply connected between the power supply terminal and the battery and adjusting the output current of the constant current source, in a dynamic frequency dividing circuit used for a portable electronic device such as an electronic watch. CONSTITUTION:A bias circuit 22 consists of resistors 30, 32 connected in series between the power supply line at high potential side of a dynamic frequency dividing circuit 4 and the power supply line at low potential side, the output of a quartz and a capacitor 34 inserted between the input terminal of the circuit 4 and the connecting point of the resistors 30, 32. The DC level of an input signal to the circuit 4 is set to 1/2 of the power supply voltage of the circuit 4. Thus, even if the output signal level of an oscillator 2 is varied and the output signal amplitude is small, normal frequency division can be made.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55141466A JPS5765021A (en) | 1980-10-09 | 1980-10-09 | Dynamic frequency division circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55141466A JPS5765021A (en) | 1980-10-09 | 1980-10-09 | Dynamic frequency division circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5765021A true JPS5765021A (en) | 1982-04-20 |
Family
ID=15292533
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55141466A Pending JPS5765021A (en) | 1980-10-09 | 1980-10-09 | Dynamic frequency division circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5765021A (en) |
-
1980
- 1980-10-09 JP JP55141466A patent/JPS5765021A/en active Pending
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