JPS5758442A - Communication controller - Google Patents
Communication controllerInfo
- Publication number
- JPS5758442A JPS5758442A JP55133365A JP13336580A JPS5758442A JP S5758442 A JPS5758442 A JP S5758442A JP 55133365 A JP55133365 A JP 55133365A JP 13336580 A JP13336580 A JP 13336580A JP S5758442 A JPS5758442 A JP S5758442A
- Authority
- JP
- Japan
- Prior art keywords
- incoming call
- reception
- control section
- call process
- coincidence
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/50—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
Abstract
PURPOSE:To reduce the load to an incoming call process of an host device (CPU), by checking the caller discriminating information (ID number) received in an incoming call process. CONSTITUTION:When the reception of an ID number is finished, a control section 3 sequentially designates the caller ID number permitted of reception stored in a file 7 via a line 34 and reads out it to one input of a comparator 8, where the ID number is compared with a reception ID number stored in a register 9. If coincidence is not detected, the control section 3 controls a line interface transmission circuit 6, makes the level of a transmission line 30 to ''0'', a restoring request is outputted and control is made a cancel this incoming call process. At the comparison process, when coincidence is detected, the control section 3 sets the bit displaying the incoming call of a status register 13 and produces interruption to a CPU2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55133365A JPS5758442A (en) | 1980-09-25 | 1980-09-25 | Communication controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55133365A JPS5758442A (en) | 1980-09-25 | 1980-09-25 | Communication controller |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5758442A true JPS5758442A (en) | 1982-04-08 |
Family
ID=15103013
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55133365A Pending JPS5758442A (en) | 1980-09-25 | 1980-09-25 | Communication controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5758442A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60172873A (en) * | 1984-02-10 | 1985-09-06 | Nippon Telegr & Teleph Corp <Ntt> | Limit incoming system |
JPS61279966A (en) * | 1985-06-05 | 1986-12-10 | Hitachi Ltd | Method to prevent incorrect connection of terminal equipment |
JPS63240229A (en) * | 1987-03-27 | 1988-10-05 | Fujitsu Ltd | POS terminal transmission control method |
-
1980
- 1980-09-25 JP JP55133365A patent/JPS5758442A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60172873A (en) * | 1984-02-10 | 1985-09-06 | Nippon Telegr & Teleph Corp <Ntt> | Limit incoming system |
JPH0311706B2 (en) * | 1984-02-10 | 1991-02-18 | Nippon Telegraph & Telephone | |
JPS61279966A (en) * | 1985-06-05 | 1986-12-10 | Hitachi Ltd | Method to prevent incorrect connection of terminal equipment |
JPS63240229A (en) * | 1987-03-27 | 1988-10-05 | Fujitsu Ltd | POS terminal transmission control method |
JPH0514453B2 (en) * | 1987-03-27 | 1993-02-25 | Fujitsu Ltd |
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