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JPS5752933A - Input and output control system - Google Patents

Input and output control system

Info

Publication number
JPS5752933A
JPS5752933A JP55127232A JP12723280A JPS5752933A JP S5752933 A JPS5752933 A JP S5752933A JP 55127232 A JP55127232 A JP 55127232A JP 12723280 A JP12723280 A JP 12723280A JP S5752933 A JPS5752933 A JP S5752933A
Authority
JP
Japan
Prior art keywords
output
input
gate
processing unit
central processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55127232A
Other languages
Japanese (ja)
Other versions
JPS6027054B2 (en
Inventor
Yasumasa Watabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55127232A priority Critical patent/JPS6027054B2/en
Publication of JPS5752933A publication Critical patent/JPS5752933A/en
Publication of JPS6027054B2 publication Critical patent/JPS6027054B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE: To increase the sectioning function at failure, by transmitting an output data received from a central processing unit to the central processing unit by return transmission.
CONSTITUTION: In transmitting an output data received at a folding register 46 to a central processing unit 1 by return transmission, the read-in of the register 46 is indicated to an input and output command signal 11. Thus, the output of an input and output device address decoder 42 and an output 101 of an input and output command decoder 43 inhibit for the input data signal 24 from being transmitted to an input data signal 14 with an AND gate 39 via an AND gate 45 and a NOT gate 38, and the output of a folding register 46 is transmitted to the input data signal 14 with an AND gate 40 and an OR gate 41.
COPYRIGHT: (C)1982,JPO&Japio
JP55127232A 1980-09-16 1980-09-16 Input/output control method Expired JPS6027054B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55127232A JPS6027054B2 (en) 1980-09-16 1980-09-16 Input/output control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55127232A JPS6027054B2 (en) 1980-09-16 1980-09-16 Input/output control method

Publications (2)

Publication Number Publication Date
JPS5752933A true JPS5752933A (en) 1982-03-29
JPS6027054B2 JPS6027054B2 (en) 1985-06-27

Family

ID=14954989

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55127232A Expired JPS6027054B2 (en) 1980-09-16 1980-09-16 Input/output control method

Country Status (1)

Country Link
JP (1) JPS6027054B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6145337A (en) * 1984-08-10 1986-03-05 Mitsubishi Electric Corp Diagnosis method of digital controller

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0614819B2 (en) * 1988-01-13 1994-03-02 英雄 桂 Culture seaweed net drainer
JPH02111651U (en) * 1989-02-20 1990-09-06

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6145337A (en) * 1984-08-10 1986-03-05 Mitsubishi Electric Corp Diagnosis method of digital controller

Also Published As

Publication number Publication date
JPS6027054B2 (en) 1985-06-27

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