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JPS5742157A - Formation of pattern for circuit substrate - Google Patents

Formation of pattern for circuit substrate

Info

Publication number
JPS5742157A
JPS5742157A JP11742680A JP11742680A JPS5742157A JP S5742157 A JPS5742157 A JP S5742157A JP 11742680 A JP11742680 A JP 11742680A JP 11742680 A JP11742680 A JP 11742680A JP S5742157 A JPS5742157 A JP S5742157A
Authority
JP
Japan
Prior art keywords
hole
pattern
circuit substrate
copper foil
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11742680A
Other languages
Japanese (ja)
Inventor
Yoshihiro Shimada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Original Assignee
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Holdings Co Ltd, Citizen Watch Co Ltd filed Critical Citizen Holdings Co Ltd
Priority to JP11742680A priority Critical patent/JPS5742157A/en
Publication of JPS5742157A publication Critical patent/JPS5742157A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To readily obtain the pattern of the circuit substrate by providing dry films which are adhesively layered in an element mounting hole in the resin substrate, and performing etching with the back surface of a copper foil in the hole being protected. CONSTITUTION:A bonding agent 2 is applied on a base film 1, and the element mounting hole 3 and a hole 4 are punched. The copper foil 5 is layered, and a dry film 6 is closely adhered to the upper and bottom surfaces. It is especially important to contact it intimately to the inside of the hole 3. It is effective, if the device is put into the gap between a hot roll 10 and a hot roll 11 having teeth 11a. When a mask 8 with a window 8a is applied, the back side 5a of a finger forming part of the copper foil is perfectly protected from etching liquid. When the resist mask is removed after the etching, the patterning of the fingers is completed. In this constitution, complicated conventional processes can be abolished, and the pattern of the circuit substrate can be formed in the simple way.
JP11742680A 1980-08-26 1980-08-26 Formation of pattern for circuit substrate Pending JPS5742157A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11742680A JPS5742157A (en) 1980-08-26 1980-08-26 Formation of pattern for circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11742680A JPS5742157A (en) 1980-08-26 1980-08-26 Formation of pattern for circuit substrate

Publications (1)

Publication Number Publication Date
JPS5742157A true JPS5742157A (en) 1982-03-09

Family

ID=14711345

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11742680A Pending JPS5742157A (en) 1980-08-26 1980-08-26 Formation of pattern for circuit substrate

Country Status (1)

Country Link
JP (1) JPS5742157A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0721595U (en) * 1992-08-31 1995-04-18 株式会社北海関東 Application box
KR101045431B1 (en) 2003-12-27 2011-06-30 엘지디스플레이 주식회사 Pattern Forming Method and Manufacturing Method of Thin Film Transistor and Liquid Crystal Display Using It
CN104640345A (en) * 2015-02-26 2015-05-20 华为技术有限公司 Printed circuit board and manufacturing method of printed circuit board
US9320838B2 (en) 2007-07-02 2016-04-26 Smith & Nephew Plc Modular wound treatment apparatus with releasable clip connection

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0721595U (en) * 1992-08-31 1995-04-18 株式会社北海関東 Application box
KR101045431B1 (en) 2003-12-27 2011-06-30 엘지디스플레이 주식회사 Pattern Forming Method and Manufacturing Method of Thin Film Transistor and Liquid Crystal Display Using It
US9320838B2 (en) 2007-07-02 2016-04-26 Smith & Nephew Plc Modular wound treatment apparatus with releasable clip connection
CN104640345A (en) * 2015-02-26 2015-05-20 华为技术有限公司 Printed circuit board and manufacturing method of printed circuit board
CN104640345B (en) * 2015-02-26 2018-03-06 华为技术有限公司 Printed circuit board (PCB) and board, printed circuit board manufacturing method

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