JPS5731219A - Balance-to-unbalance converting circuit - Google Patents
Balance-to-unbalance converting circuitInfo
- Publication number
- JPS5731219A JPS5731219A JP10591380A JP10591380A JPS5731219A JP S5731219 A JPS5731219 A JP S5731219A JP 10591380 A JP10591380 A JP 10591380A JP 10591380 A JP10591380 A JP 10591380A JP S5731219 A JPS5731219 A JP S5731219A
- Authority
- JP
- Japan
- Prior art keywords
- balance
- input signal
- terminal
- voltage
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/32—Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
Landscapes
- Networks Using Active Elements (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Interface Circuits In Exchanges (AREA)
Abstract
PURPOSE:To convert a balance input signal including the external noise into an unbalance signal, by giving a division of voltage to an input signal of the balance input signal and then connecting the input signal to both the forward phase input terminal and the reverse phase input terminal of an operational amplifier. CONSTITUTION:At the circuit correspondence part of an electronic switchboard, one of balance input signals V1 and V2 receives a division of voltage to be connected to the forward phase input terminal of an operational amplifier A. While the other balance input signal receives divisions of voltage R5 and R6 to be connected to the reverse phase input terminal 1 of the amplifier A via resistances R1 and R2. Then the terminal 1 is connected to an output terminal 3 of the amplifier A by a resistance R4 to deliver the difference of the balance input signals.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10591380A JPS5731219A (en) | 1980-07-31 | 1980-07-31 | Balance-to-unbalance converting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10591380A JPS5731219A (en) | 1980-07-31 | 1980-07-31 | Balance-to-unbalance converting circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5731219A true JPS5731219A (en) | 1982-02-19 |
JPS6242411B2 JPS6242411B2 (en) | 1987-09-08 |
Family
ID=14420095
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10591380A Granted JPS5731219A (en) | 1980-07-31 | 1980-07-31 | Balance-to-unbalance converting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5731219A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0257626U (en) * | 1988-10-21 | 1990-04-25 |
-
1980
- 1980-07-31 JP JP10591380A patent/JPS5731219A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0257626U (en) * | 1988-10-21 | 1990-04-25 |
Also Published As
Publication number | Publication date |
---|---|
JPS6242411B2 (en) | 1987-09-08 |
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