JPS57210705A - Muting circuit for variable impedance circuit - Google Patents
Muting circuit for variable impedance circuitInfo
- Publication number
- JPS57210705A JPS57210705A JP9469381A JP9469381A JPS57210705A JP S57210705 A JPS57210705 A JP S57210705A JP 9469381 A JP9469381 A JP 9469381A JP 9469381 A JP9469381 A JP 9469381A JP S57210705 A JPS57210705 A JP S57210705A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- gate
- hold
- variable resistor
- muting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/34—Muting amplifier when no signal is present
- H03G3/348—Muting in response to a mechanical action or to power supply variations, e.g. during tuning; Click removal circuits
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
PURPOSE:To avoid the production of an abnormal sound when a gate is switched, by providing a muting circuit for a plurality of applications of a variable resistor using a hold-through gate. CONSTITUTION:When a switch S4 turns on and a switch S5 turns off, a hold- through gate 7 is in a through-state and a flip-flop 6 waites for input. A variable resistor 1 is operated as a sound volume adjuster. A state just before the operation of the switches S4 and S5 is given from a hold-through gate 7' to a tone controlling circuit. If a variable resistor 1 is set to a value greater than a reference value of a comparator 4, the flip-flop 6 is at low level and an attenuator 10 is controlled to be muted. As a result, a large sound when the switches S4 and S5 are operated can be prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9469381A JPS57210705A (en) | 1981-06-19 | 1981-06-19 | Muting circuit for variable impedance circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9469381A JPS57210705A (en) | 1981-06-19 | 1981-06-19 | Muting circuit for variable impedance circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57210705A true JPS57210705A (en) | 1982-12-24 |
JPH0231524B2 JPH0231524B2 (en) | 1990-07-13 |
Family
ID=14117261
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9469381A Granted JPS57210705A (en) | 1981-06-19 | 1981-06-19 | Muting circuit for variable impedance circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57210705A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54150922A (en) * | 1978-05-19 | 1979-11-27 | Matsushita Electric Ind Co Ltd | Control unit |
JPS5633814U (en) * | 1979-08-23 | 1981-04-02 |
-
1981
- 1981-06-19 JP JP9469381A patent/JPS57210705A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54150922A (en) * | 1978-05-19 | 1979-11-27 | Matsushita Electric Ind Co Ltd | Control unit |
JPS5633814U (en) * | 1979-08-23 | 1981-04-02 |
Also Published As
Publication number | Publication date |
---|---|
JPH0231524B2 (en) | 1990-07-13 |
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