JPS57207978A - Quantizing circuit - Google Patents
Quantizing circuitInfo
- Publication number
- JPS57207978A JPS57207978A JP56094425A JP9442581A JPS57207978A JP S57207978 A JPS57207978 A JP S57207978A JP 56094425 A JP56094425 A JP 56094425A JP 9442581 A JP9442581 A JP 9442581A JP S57207978 A JPS57207978 A JP S57207978A
- Authority
- JP
- Japan
- Prior art keywords
- slice level
- inputted
- circuit
- inputted pattern
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V10/00—Arrangements for image or video recognition or understanding
- G06V10/20—Image preprocessing
- G06V10/28—Quantising the image, e.g. histogram thresholding for discrimination between background and foreground patterns
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Theoretical Computer Science (AREA)
- Character Input (AREA)
Abstract
PURPOSE:To eliminate influeneces of partial blur, whole blur, etc., of inputted patterns and to surely quantize input patterns, by judging the saturated condition of inputted patterns d by respectively installing slice levels in accordance with the judged result. CONSTITUTION:A prescribed reference slice level is calculated from an inputted pattern by a reference slice level calculating circuit 1, and whether the inputted pattern is under over saturated condition or not is judged at a judging circuit 2 based on the slice level from the circuit 1. The output G from the circuit 2 is judged at a selector controlling circuit, and, when the inputted pattern is under saturated condition, the inputted pattern is not saturated, a slice level is set from slice levels which correspond to every level variation at each point of the inputted pattern by using a minimum-maximum slice level generating circuit, a comparator, etc., with the reference slice level as the base, and the inputted pattern is quantized by the slice level thus set.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56094425A JPS57207978A (en) | 1981-06-18 | 1981-06-18 | Quantizing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56094425A JPS57207978A (en) | 1981-06-18 | 1981-06-18 | Quantizing circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57207978A true JPS57207978A (en) | 1982-12-20 |
Family
ID=14109871
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56094425A Pending JPS57207978A (en) | 1981-06-18 | 1981-06-18 | Quantizing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57207978A (en) |
-
1981
- 1981-06-18 JP JP56094425A patent/JPS57207978A/en active Pending
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