JPS57197661A - Multiplex controlling system for file memory - Google Patents
Multiplex controlling system for file memoryInfo
- Publication number
- JPS57197661A JPS57197661A JP56082282A JP8228281A JPS57197661A JP S57197661 A JPS57197661 A JP S57197661A JP 56082282 A JP56082282 A JP 56082282A JP 8228281 A JP8228281 A JP 8228281A JP S57197661 A JPS57197661 A JP S57197661A
- Authority
- JP
- Japan
- Prior art keywords
- file
- memory
- file memory
- memory units
- controlling system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 title abstract 9
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE:To increase the reliability of a file memory, by processing from a plurality of memory units via a file memory control connected to individual buses. CONSTITUTION:A CPU 1 decides whether or not an access address exists in a plurality of memory units 2 and 3, and after the same information is written in all the memory units where the access address exists, the same information of te same address is read out from a plurality of memory units and written in a plurality of file memories 6 and 7 via individual buses 10 and 11 and file memory controllers 4 and 5 connected to the buses.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56082282A JPS57197661A (en) | 1981-05-29 | 1981-05-29 | Multiplex controlling system for file memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56082282A JPS57197661A (en) | 1981-05-29 | 1981-05-29 | Multiplex controlling system for file memory |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57197661A true JPS57197661A (en) | 1982-12-03 |
Family
ID=13770153
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56082282A Pending JPS57197661A (en) | 1981-05-29 | 1981-05-29 | Multiplex controlling system for file memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57197661A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02201557A (en) * | 1989-01-31 | 1990-08-09 | Toshiba Corp | Redundant file access device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4947307A (en) * | 1972-09-12 | 1974-05-08 | ||
JPS5210736B2 (en) * | 1973-01-22 | 1977-03-25 | ||
JPS5534756A (en) * | 1978-09-02 | 1980-03-11 | Nec Corp | Double recording system of magnetic disc device |
-
1981
- 1981-05-29 JP JP56082282A patent/JPS57197661A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4947307A (en) * | 1972-09-12 | 1974-05-08 | ||
JPS5210736B2 (en) * | 1973-01-22 | 1977-03-25 | ||
JPS5534756A (en) * | 1978-09-02 | 1980-03-11 | Nec Corp | Double recording system of magnetic disc device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02201557A (en) * | 1989-01-31 | 1990-08-09 | Toshiba Corp | Redundant file access device |
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