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JPS57191900A - Method for junction destructive prom test - Google Patents

Method for junction destructive prom test

Info

Publication number
JPS57191900A
JPS57191900A JP7646681A JP7646681A JPS57191900A JP S57191900 A JPS57191900 A JP S57191900A JP 7646681 A JP7646681 A JP 7646681A JP 7646681 A JP7646681 A JP 7646681A JP S57191900 A JPS57191900 A JP S57191900A
Authority
JP
Japan
Prior art keywords
test
current
memory cell
circuit
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7646681A
Other languages
Japanese (ja)
Other versions
JPS6349320B2 (en
Inventor
Nobuhiko Ono
Katsuya Mizue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP7646681A priority Critical patent/JPS57191900A/en
Publication of JPS57191900A publication Critical patent/JPS57191900A/en
Publication of JPS6349320B2 publication Critical patent/JPS6349320B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81—Threshold
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5006—Current

Landscapes

  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To perform a test with high-reliability, by flowing a current, which does not cause the junction breakdown, to a selected memory cell and reading the voltage of the output terminal of a current source circuit at this time to discriminate whether the memory cell is normal or not. CONSTITUTION:A constant current circuit I0 is connected to an output terminal OUT1, and a current is supplied with a small current value, which is smaller than the junction breakdown current of a transistor constituting a memory cell, under a voltage VCC which causes the breakdown between the collector and the emitter. The voltage value in the terminal OUT1 is read by comparators C1 and C2. Preliminarily set upper limit value VH and lower limit value VL are applied to comparators C1 and C2, and discrimination outputs are inputted to an AND gate circuit G to obtain a discrimination output GO/NG. When the voltage value is between voltages VH and VL, the discrimination output GO for normal goods is obtained. In case of the test for a write circuit WR, a memory cell group TSTR1 for test is selected to test the circuit.
JP7646681A 1981-05-22 1981-05-22 Method for junction destructive prom test Granted JPS57191900A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7646681A JPS57191900A (en) 1981-05-22 1981-05-22 Method for junction destructive prom test

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7646681A JPS57191900A (en) 1981-05-22 1981-05-22 Method for junction destructive prom test

Publications (2)

Publication Number Publication Date
JPS57191900A true JPS57191900A (en) 1982-11-25
JPS6349320B2 JPS6349320B2 (en) 1988-10-04

Family

ID=13605935

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7646681A Granted JPS57191900A (en) 1981-05-22 1981-05-22 Method for junction destructive prom test

Country Status (1)

Country Link
JP (1) JPS57191900A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61184799A (en) * 1985-02-13 1986-08-18 Nec Corp Programmable read-only memory
JPS61187200A (en) * 1985-02-14 1986-08-20 Nec Corp Programmable read only memory
JPS61204898A (en) * 1985-03-06 1986-09-10 Nec Corp Programmable read-only semiconductor storage device
JPS61230700A (en) * 1985-04-05 1986-10-14 Nec Corp Programmable read-only memory
EP0214914A2 (en) * 1985-09-09 1987-03-18 Fujitsu Limited Test method for detecting faulty memory cells in a programmable semiconductor device
JPS63119099A (en) * 1986-11-06 1988-05-23 Hitachi Ltd Programmable rom
EP1132924A2 (en) * 2000-02-04 2001-09-12 Hewlett-Packard Company, A Delaware Corporation Self-testing of magneto-resistive memory arrays

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5268192B2 (en) * 2009-02-26 2013-08-21 株式会社半導体エネルギー研究所 OTP memory inspection method, OTP memory manufacturing method, and semiconductor device manufacturing method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5587386A (en) * 1978-11-27 1980-07-02 Fujitsu Ltd Semiconductor memory device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5587386A (en) * 1978-11-27 1980-07-02 Fujitsu Ltd Semiconductor memory device

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61184799A (en) * 1985-02-13 1986-08-18 Nec Corp Programmable read-only memory
JPH0524600B2 (en) * 1985-02-13 1993-04-08 Nippon Electric Co
JPS61187200A (en) * 1985-02-14 1986-08-20 Nec Corp Programmable read only memory
JPS61204898A (en) * 1985-03-06 1986-09-10 Nec Corp Programmable read-only semiconductor storage device
JPH0527198B2 (en) * 1985-03-06 1993-04-20 Nippon Electric Co
JPS61230700A (en) * 1985-04-05 1986-10-14 Nec Corp Programmable read-only memory
JPH0527199B2 (en) * 1985-04-05 1993-04-20 Nippon Electric Co
EP0214914A2 (en) * 1985-09-09 1987-03-18 Fujitsu Limited Test method for detecting faulty memory cells in a programmable semiconductor device
JPS63119099A (en) * 1986-11-06 1988-05-23 Hitachi Ltd Programmable rom
EP1132924A2 (en) * 2000-02-04 2001-09-12 Hewlett-Packard Company, A Delaware Corporation Self-testing of magneto-resistive memory arrays
EP1132924A3 (en) * 2000-02-04 2002-12-04 Hewlett-Packard Company, A Delaware Corporation Self-testing of magneto-resistive memory arrays
US6584589B1 (en) 2000-02-04 2003-06-24 Hewlett-Packard Development Company, L.P. Self-testing of magneto-resistive memory arrays

Also Published As

Publication number Publication date
JPS6349320B2 (en) 1988-10-04

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