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JPS57183053A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57183053A
JPS57183053A JP6956181A JP6956181A JPS57183053A JP S57183053 A JPS57183053 A JP S57183053A JP 6956181 A JP6956181 A JP 6956181A JP 6956181 A JP6956181 A JP 6956181A JP S57183053 A JPS57183053 A JP S57183053A
Authority
JP
Japan
Prior art keywords
wiring
implanted
shortcircuiting
wirings
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6956181A
Other languages
Japanese (ja)
Other versions
JPS6410097B2 (en
Inventor
Hiromi Sakurai
Yoichi Akasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP6956181A priority Critical patent/JPS57183053A/en
Priority to DE19823217026 priority patent/DE3217026A1/en
Publication of JPS57183053A publication Critical patent/JPS57183053A/en
Priority to US06/717,597 priority patent/US4899206A/en
Publication of JPS6410097B2 publication Critical patent/JPS6410097B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To the whiskers generated in case of forming the wiring preventing the wirings from shortcircuiting by a method wherein, when a metallic wiring comprising Al or Al alloy is formed on the semiconductor wafer including a device, the impurity ion such as Ar, P, As and the like is implanted in the position at 800-2,000Angstrom from the surface of the metallic wiring. CONSTITUTION:The Si wafer 10 whereon the device with the PN joint is formed is coated with the SiO2 film 11 and the Al wiring 12 with the high purity and the thickness around 7,000Angstrom is formed on said film 11. Next, the impurity ion such as As<+>, P<+>, Ar<+>, Sb<+> and the like is implanted in the surface of said wiring 12 to form the ion implanted layer on the position at 800-2,000Angstrom from the surface. Through these procedures, the whiskers generated in case of forming the wiring 12 may be eliminated to prevent the wirings from shortcircuiting.
JP6956181A 1981-05-06 1981-05-06 Semiconductor device Granted JPS57183053A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP6956181A JPS57183053A (en) 1981-05-06 1981-05-06 Semiconductor device
DE19823217026 DE3217026A1 (en) 1981-05-06 1982-05-06 Semiconductor device
US06/717,597 US4899206A (en) 1981-05-06 1985-04-01 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6956181A JPS57183053A (en) 1981-05-06 1981-05-06 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS57183053A true JPS57183053A (en) 1982-11-11
JPS6410097B2 JPS6410097B2 (en) 1989-02-21

Family

ID=13406285

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6956181A Granted JPS57183053A (en) 1981-05-06 1981-05-06 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57183053A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4890151A (en) * 1983-03-12 1989-12-26 Ricoh Company, Ltd. Thin-film and its forming method
US5040048A (en) * 1988-10-25 1991-08-13 Mitsubishi Denki Kabushiki Kaisha Metal interconnection layer having reduced hillock formation
US7157381B2 (en) * 2004-06-15 2007-01-02 Infineon Technologies Ag Method for providing whisker-free aluminum metal lines or aluminum alloy lines in integrated circuits

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55158649A (en) * 1979-05-30 1980-12-10 Fujitsu Ltd Manufacture of electrode wiring
JPS57124431A (en) * 1981-01-27 1982-08-03 Toshiba Corp Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55158649A (en) * 1979-05-30 1980-12-10 Fujitsu Ltd Manufacture of electrode wiring
JPS57124431A (en) * 1981-01-27 1982-08-03 Toshiba Corp Manufacture of semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4890151A (en) * 1983-03-12 1989-12-26 Ricoh Company, Ltd. Thin-film and its forming method
US5040048A (en) * 1988-10-25 1991-08-13 Mitsubishi Denki Kabushiki Kaisha Metal interconnection layer having reduced hillock formation
US7157381B2 (en) * 2004-06-15 2007-01-02 Infineon Technologies Ag Method for providing whisker-free aluminum metal lines or aluminum alloy lines in integrated circuits
CN100403496C (en) * 2004-06-15 2008-07-16 南亚科技股份有限公司 Method for making whisker-free aluminum wire or aluminum alloy wire in integrated circuit

Also Published As

Publication number Publication date
JPS6410097B2 (en) 1989-02-21

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