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JPS57180137A - Semicondudtor device - Google Patents

Semicondudtor device

Info

Publication number
JPS57180137A
JPS57180137A JP6416181A JP6416181A JPS57180137A JP S57180137 A JPS57180137 A JP S57180137A JP 6416181 A JP6416181 A JP 6416181A JP 6416181 A JP6416181 A JP 6416181A JP S57180137 A JPS57180137 A JP S57180137A
Authority
JP
Japan
Prior art keywords
substrate
compensation plates
electrodes
unevenness
sides
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6416181A
Other languages
Japanese (ja)
Inventor
Tokuo Watanabe
Masami Naito
Nobutake Konishi
Takeshi Yokota
Tomoyuki Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6416181A priority Critical patent/JPS57180137A/en
Publication of JPS57180137A publication Critical patent/JPS57180137A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To obtain a device without an imbalance load action by a method wherein a pair of main electrodes are provided to both front and back surfaces of a semiconductor substrate which has at least one P-N junction and the maximum roughness of unevenness of the sides, which have contact with the main electrodes, of slipping compensation plates, via which the conductors are pressed and got contact to the surfaces of the substrate, is made smaller than the thickness of the main electrodes. CONSTITUTION:Bevel processing is worked upon P-N junctions exposed at the sides of an Si substrate 1 which has P-N-P-N four-layer semicoductor layers to reduce field intensity and the processed parts are protected by silicon rubber layers 8. Then a cathode electrode 3 is provided via a control electrode 9 to one surface of the substrate 1 and an anode electrode 2 is provided to another surface of the substrate 1. Slipping compensation plates 5 and 4 which have unevenness of their contacting sides are provided for the electrodes 3 and 2 respectively. After that these compensation plates 5 and 4 are pressed by conductors 7 and 6 respectively and flanges 13 and 12 provided to the respective circumferences are soldered to a ceramic seal 14. In this composition, the maximum roughness of unevenness of the compensation plates 5 and 4 is determined less than the thickness of the electrodes 3 and 2.
JP6416181A 1981-04-30 1981-04-30 Semicondudtor device Pending JPS57180137A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6416181A JPS57180137A (en) 1981-04-30 1981-04-30 Semicondudtor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6416181A JPS57180137A (en) 1981-04-30 1981-04-30 Semicondudtor device

Publications (1)

Publication Number Publication Date
JPS57180137A true JPS57180137A (en) 1982-11-06

Family

ID=13250060

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6416181A Pending JPS57180137A (en) 1981-04-30 1981-04-30 Semicondudtor device

Country Status (1)

Country Link
JP (1) JPS57180137A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6042863A (en) * 1983-08-17 1985-03-07 Mitsubishi Electric Corp Light-driven semiconductor device
JPS6262532A (en) * 1985-09-12 1987-03-19 Fuji Electric Co Ltd semiconductor equipment
JPS6279669A (en) * 1985-10-03 1987-04-13 Mitsubishi Electric Corp Semiconductor device
WO1999012197A1 (en) * 1997-08-29 1999-03-11 Hitachi, Ltd. Compression bonded semiconductor device and power converter using the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5279660A (en) * 1975-12-17 1977-07-04 Bbc Brown Boveri & Cie Power semiconductor circuit element with flat cell construction
JPS5578535A (en) * 1978-12-08 1980-06-13 Mitsubishi Electric Corp Pressure-contact type semiconductor device
JPS5598835A (en) * 1979-01-19 1980-07-28 Mitsubishi Electric Corp Pressure-welded semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5279660A (en) * 1975-12-17 1977-07-04 Bbc Brown Boveri & Cie Power semiconductor circuit element with flat cell construction
JPS5578535A (en) * 1978-12-08 1980-06-13 Mitsubishi Electric Corp Pressure-contact type semiconductor device
JPS5598835A (en) * 1979-01-19 1980-07-28 Mitsubishi Electric Corp Pressure-welded semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6042863A (en) * 1983-08-17 1985-03-07 Mitsubishi Electric Corp Light-driven semiconductor device
JPS6262532A (en) * 1985-09-12 1987-03-19 Fuji Electric Co Ltd semiconductor equipment
JPS6279669A (en) * 1985-10-03 1987-04-13 Mitsubishi Electric Corp Semiconductor device
WO1999012197A1 (en) * 1997-08-29 1999-03-11 Hitachi, Ltd. Compression bonded semiconductor device and power converter using the same

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