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JPS57166066A - Bias generating system for substrate - Google Patents

Bias generating system for substrate

Info

Publication number
JPS57166066A
JPS57166066A JP56052032A JP5203281A JPS57166066A JP S57166066 A JPS57166066 A JP S57166066A JP 56052032 A JP56052032 A JP 56052032A JP 5203281 A JP5203281 A JP 5203281A JP S57166066 A JPS57166066 A JP S57166066A
Authority
JP
Japan
Prior art keywords
substrate
terminal
bias
capacitor
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56052032A
Other languages
Japanese (ja)
Other versions
JPH0224027B2 (en
Inventor
Tetsuya Iizuka
Hiroshi Hara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56052032A priority Critical patent/JPS57166066A/en
Priority to US06/364,639 priority patent/US4559548A/en
Priority to EP82102994A priority patent/EP0062894B1/en
Priority to DE8282102994T priority patent/DE3276920D1/en
Publication of JPS57166066A publication Critical patent/JPS57166066A/en
Publication of JPH0224027B2 publication Critical patent/JPH0224027B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/211—Design considerations for internal polarisation
    • H10D89/213—Design considerations for internal polarisation in field-effect devices
    • H10D89/215—Design considerations for internal polarisation in field-effect devices comprising arrangements for charge pumping or biasing substrates

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent an erroneous action by hampering minority carriers from being injected into a substrate, in a bias generating system consisting of a charge pumping capacitive device and a rectifying device, by a method wherein a P-N junction formed by one of the electrode forming regions of each of the devices and the substrate is constantly subjected to a reverse bias. CONSTITUTION:An AC voltage generating circuit 21 with a grounded terminal is provided between a reference voltage of a ground potential VSS and a power source voltage VDD and an oscillating Ac is generated between the two voltages. The other terminal of the circuit 21 is connected to a substrate 24 through a capacitor 22 and a P channel MOS transistor 23, and a node N12 between the transistor 23 drain and the capacitor 22 is grounded through a P channel MOS transistor 25. In this arrangement, the transistors 23 and 25 are both provided with a rectifying feature and the current, thanks to a usual pumping effect, flows from a terminal 24 to the ground through the node N12, applying a negative bias to the substrate 24.
JP56052032A 1981-04-07 1981-04-07 Bias generating system for substrate Granted JPS57166066A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP56052032A JPS57166066A (en) 1981-04-07 1981-04-07 Bias generating system for substrate
US06/364,639 US4559548A (en) 1981-04-07 1982-04-02 CMOS Charge pump free of parasitic injection
EP82102994A EP0062894B1 (en) 1981-04-07 1982-04-07 Semiconductor device
DE8282102994T DE3276920D1 (en) 1981-04-07 1982-04-07 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56052032A JPS57166066A (en) 1981-04-07 1981-04-07 Bias generating system for substrate

Publications (2)

Publication Number Publication Date
JPS57166066A true JPS57166066A (en) 1982-10-13
JPH0224027B2 JPH0224027B2 (en) 1990-05-28

Family

ID=12903464

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56052032A Granted JPS57166066A (en) 1981-04-07 1981-04-07 Bias generating system for substrate

Country Status (1)

Country Link
JP (1) JPS57166066A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55175259U (en) * 1979-05-31 1980-12-16

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55175259U (en) * 1979-05-31 1980-12-16

Also Published As

Publication number Publication date
JPH0224027B2 (en) 1990-05-28

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