JPS57157559A - Read-only semiconductor memory - Google Patents
Read-only semiconductor memoryInfo
- Publication number
- JPS57157559A JPS57157559A JP4217881A JP4217881A JPS57157559A JP S57157559 A JPS57157559 A JP S57157559A JP 4217881 A JP4217881 A JP 4217881A JP 4217881 A JP4217881 A JP 4217881A JP S57157559 A JPS57157559 A JP S57157559A
- Authority
- JP
- Japan
- Prior art keywords
- resistors
- column lines
- lines
- row
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/06—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using diode elements
Landscapes
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
PURPOSE:To obtain an ROM having a high reliabiliy and high density in a short time by recrystallizing partly by a laser light emission an amorphous Si as a resistor when the crossing points of a plurality of row and column lines are connected with series connecting circuits of resistors and diodes. CONSTITUTION:The crossing points of respective row lines R1, R2 and respective column lines C1, C2 are connected via diodes d11, d12, d21, d22 and resistors r11, r12, r21, r22, thereby forming a programmable ROM. In this structure, fuses which are normally used are not employed as resistors, but polycrystalline silicon injected with impurity ions in high density varying in resistance values in the order of 5 to 6 places is employed around after or before the heat treatment. That is, a series connection of an N<-> type diffused part 2 corresponding to a resistor and a polycrystalline silicon 4 is provided between the metallic wire 1 corresponding to the column lines C1, C2 and an N<+> type diffused layer 3 corresponding to the row lines R1, R2. Further, a laser light is emitted to the silicon 2 except the non-emitted region 5 and is recrystallized, thereby lowering the resistance value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4217881A JPS57157559A (en) | 1981-03-23 | 1981-03-23 | Read-only semiconductor memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4217881A JPS57157559A (en) | 1981-03-23 | 1981-03-23 | Read-only semiconductor memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57157559A true JPS57157559A (en) | 1982-09-29 |
Family
ID=12628725
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4217881A Pending JPS57157559A (en) | 1981-03-23 | 1981-03-23 | Read-only semiconductor memory |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57157559A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5281553A (en) * | 1987-07-02 | 1994-01-25 | Bull, S.A. | Method for controlling the state of conduction of an MOS transistor of an integrated circuit |
| JP2024512941A (en) * | 2021-08-31 | 2024-03-21 | 長江存儲科技有限責任公司 | Three-dimensional memory device and method of forming the same |
| US12300317B2 (en) | 2021-08-31 | 2025-05-13 | Yangtze Memory Technologies Co., Ltd. | Three-dimensional memory device and methods for forming the same |
-
1981
- 1981-03-23 JP JP4217881A patent/JPS57157559A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5281553A (en) * | 1987-07-02 | 1994-01-25 | Bull, S.A. | Method for controlling the state of conduction of an MOS transistor of an integrated circuit |
| JP2024512941A (en) * | 2021-08-31 | 2024-03-21 | 長江存儲科技有限責任公司 | Three-dimensional memory device and method of forming the same |
| US12300317B2 (en) | 2021-08-31 | 2025-05-13 | Yangtze Memory Technologies Co., Ltd. | Three-dimensional memory device and methods for forming the same |
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