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JPS57155584A - Control system for refresh memory - Google Patents

Control system for refresh memory

Info

Publication number
JPS57155584A
JPS57155584A JP3939781A JP3939781A JPS57155584A JP S57155584 A JPS57155584 A JP S57155584A JP 3939781 A JP3939781 A JP 3939781A JP 3939781 A JP3939781 A JP 3939781A JP S57155584 A JPS57155584 A JP S57155584A
Authority
JP
Japan
Prior art keywords
control system
refresh memory
refresh
memory
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3939781A
Other languages
Japanese (ja)
Inventor
Shigeru Shibukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3939781A priority Critical patent/JPS57155584A/en
Publication of JPS57155584A publication Critical patent/JPS57155584A/en
Pending legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)
JP3939781A 1981-03-20 1981-03-20 Control system for refresh memory Pending JPS57155584A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3939781A JPS57155584A (en) 1981-03-20 1981-03-20 Control system for refresh memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3939781A JPS57155584A (en) 1981-03-20 1981-03-20 Control system for refresh memory

Publications (1)

Publication Number Publication Date
JPS57155584A true JPS57155584A (en) 1982-09-25

Family

ID=12551854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3939781A Pending JPS57155584A (en) 1981-03-20 1981-03-20 Control system for refresh memory

Country Status (1)

Country Link
JP (1) JPS57155584A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5991559A (en) * 1982-11-17 1984-05-26 Sony Corp Writing circuit of memory
JPS6078483A (en) * 1983-10-04 1985-05-04 日本電信電話株式会社 Memory control circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5282134A (en) * 1975-12-29 1977-07-09 Hitachi Ltd Data display control system
JPS5516304A (en) * 1978-07-20 1980-02-05 Ichikoh Industries Ltd Automotive lamp

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5282134A (en) * 1975-12-29 1977-07-09 Hitachi Ltd Data display control system
JPS5516304A (en) * 1978-07-20 1980-02-05 Ichikoh Industries Ltd Automotive lamp

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5991559A (en) * 1982-11-17 1984-05-26 Sony Corp Writing circuit of memory
JPS6078483A (en) * 1983-10-04 1985-05-04 日本電信電話株式会社 Memory control circuit

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