JPS5714922Y2 - - Google Patents
Info
- Publication number
- JPS5714922Y2 JPS5714922Y2 JP1977127782U JP12778277U JPS5714922Y2 JP S5714922 Y2 JPS5714922 Y2 JP S5714922Y2 JP 1977127782 U JP1977127782 U JP 1977127782U JP 12778277 U JP12778277 U JP 12778277U JP S5714922 Y2 JPS5714922 Y2 JP S5714922Y2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Electrostatic Separation (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1977127782U JPS5714922Y2 (en) | 1977-09-22 | 1977-09-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1977127782U JPS5714922Y2 (en) | 1977-09-22 | 1977-09-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5453776U JPS5453776U (en) | 1979-04-13 |
| JPS5714922Y2 true JPS5714922Y2 (en) | 1982-03-27 |
Family
ID=29090858
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1977127782U Expired JPS5714922Y2 (en) | 1977-09-22 | 1977-09-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5714922Y2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6304937B1 (en) | 1990-04-18 | 2001-10-16 | Rambus Inc. | Method of operation of a memory controller |
| US6324120B2 (en) | 1990-04-18 | 2001-11-27 | Rambus Inc. | Memory device having a variable data output length |
| US6684285B2 (en) | 1990-04-18 | 2004-01-27 | Rambus Inc. | Synchronous integrated circuit device |
-
1977
- 1977-09-22 JP JP1977127782U patent/JPS5714922Y2/ja not_active Expired
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6304937B1 (en) | 1990-04-18 | 2001-10-16 | Rambus Inc. | Method of operation of a memory controller |
| US6324120B2 (en) | 1990-04-18 | 2001-11-27 | Rambus Inc. | Memory device having a variable data output length |
| US6426916B2 (en) | 1990-04-18 | 2002-07-30 | Rambus Inc. | Memory device having a variable data output length and a programmable register |
| US6452863B2 (en) | 1990-04-18 | 2002-09-17 | Rambus Inc. | Method of operating a memory device having a variable data input length |
| US6546446B2 (en) | 1990-04-18 | 2003-04-08 | Rambus Inc. | Synchronous memory device having automatic precharge |
| US6564281B2 (en) | 1990-04-18 | 2003-05-13 | Rambus Inc. | Synchronous memory device having automatic precharge |
| US6684285B2 (en) | 1990-04-18 | 2004-01-27 | Rambus Inc. | Synchronous integrated circuit device |
| US6697295B2 (en) | 1990-04-18 | 2004-02-24 | Rambus Inc. | Memory device having a programmable register |
| US6715020B2 (en) | 1990-04-18 | 2004-03-30 | Rambus Inc. | Synchronous integrated circuit device |
| US6751696B2 (en) | 1990-04-18 | 2004-06-15 | Rambus Inc. | Memory device having a programmable register |
| US7209997B2 (en) | 1990-04-18 | 2007-04-24 | Rambus Inc. | Controller device and method for operating same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5453776U (en) | 1979-04-13 |