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JPS57136256A - Information setting method - Google Patents

Information setting method

Info

Publication number
JPS57136256A
JPS57136256A JP56020837A JP2083781A JPS57136256A JP S57136256 A JPS57136256 A JP S57136256A JP 56020837 A JP56020837 A JP 56020837A JP 2083781 A JP2083781 A JP 2083781A JP S57136256 A JPS57136256 A JP S57136256A
Authority
JP
Japan
Prior art keywords
bit information
circuit
address information
key
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56020837A
Other languages
Japanese (ja)
Inventor
Yoshitaka Yamamoto
Takashi Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Facom Corp
Original Assignee
Fuji Facom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Facom Corp filed Critical Fuji Facom Corp
Priority to JP56020837A priority Critical patent/JPS57136256A/en
Publication of JPS57136256A publication Critical patent/JPS57136256A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/02—Input arrangements using manually operated switches, e.g. using keyboards or dials
    • G06F3/023—Arrangements for converting discrete items of information into a coded form, e.g. arrangements for interpreting keyboard generated codes as alphanumeric codes, operand codes or instruction codes

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Input From Keyboards Or The Like (AREA)

Abstract

PURPOSE:To eliminate a complicated operation in a complete and easy way, by setting the bit information to a mode setting register only through a key operation of an input panel. CONSTITUTION:A desired key on an input panel 27 is operated, the corresponding address information and the bit information to be set are converted into the machine words through a key analyzing circuit 26. These address information and bit information are composed of an interface circuit 25, and the bit information given from the circuit 25 is set to a mode setting register 11 by a DMA control circuit 24 via a common bus 22 under the DMA control in compliance with the address information.
JP56020837A 1981-02-17 1981-02-17 Information setting method Pending JPS57136256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56020837A JPS57136256A (en) 1981-02-17 1981-02-17 Information setting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56020837A JPS57136256A (en) 1981-02-17 1981-02-17 Information setting method

Publications (1)

Publication Number Publication Date
JPS57136256A true JPS57136256A (en) 1982-08-23

Family

ID=12038177

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56020837A Pending JPS57136256A (en) 1981-02-17 1981-02-17 Information setting method

Country Status (1)

Country Link
JP (1) JPS57136256A (en)

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