JPS57133729A - Ternary ring counter - Google Patents
Ternary ring counterInfo
- Publication number
- JPS57133729A JPS57133729A JP1986381A JP1986381A JPS57133729A JP S57133729 A JPS57133729 A JP S57133729A JP 1986381 A JP1986381 A JP 1986381A JP 1986381 A JP1986381 A JP 1986381A JP S57133729 A JPS57133729 A JP S57133729A
- Authority
- JP
- Japan
- Prior art keywords
- circuits
- clock pulse
- gate circuit
- output
- output state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/40—Gating or clocking signals applied to all stages, i.e. synchronous counters
- H03K23/50—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits
- H03K23/54—Ring counters, i.e. feedback shift register counters
- H03K23/544—Ring counters, i.e. feedback shift register counters with a base which is an odd number
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To reduce the number of components, by constituting a ternary counter with two D type flip-flop circuits and a logical gate. CONSTITUTION:Assuming that the output state of D flip-flop circuits 2 and 1 just before a clock pulse is applied is 1, 1, since the output level of an AND gate circuit 4 is at ''0'', although the output state of the circuits 2, 1 at the leading edge of the clock pulse is 1, 0, the output level of the gate circuit 4 remains ''0''. The output state of the circuits 2, 1 is 0, 0 at the leading edge of the clock pulse at the 2nd shot and the output level of the gate circuit 4 transits to 1. Thereafter, every time the leading edge of the clock pulse reaches, the output state of the gate circuit 4 and the circuits 2, 1 changes and an output signal equivalent to a ternary ring counter can be obtained from terminals X, Y, Z.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986381A JPS57133729A (en) | 1981-02-12 | 1981-02-12 | Ternary ring counter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986381A JPS57133729A (en) | 1981-02-12 | 1981-02-12 | Ternary ring counter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57133729A true JPS57133729A (en) | 1982-08-18 |
Family
ID=12011051
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986381A Pending JPS57133729A (en) | 1981-02-12 | 1981-02-12 | Ternary ring counter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57133729A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62500698A (en) * | 1984-10-29 | 1987-03-19 | アメリカン テレフオン アンド テレグラフ カムパニ− | Self-correcting frequency down-converter |
| JPH02186718A (en) * | 1989-01-13 | 1990-07-23 | Nec Corp | 1/3 frequency dividing circuit |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52114372A (en) * | 1976-03-23 | 1977-09-26 | Toshiba Corp | Approximating counter for use in time measurement |
| JPS5396657A (en) * | 1977-02-02 | 1978-08-24 | Nec Corp | Digital frequency divider circuit |
-
1981
- 1981-02-12 JP JP1986381A patent/JPS57133729A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52114372A (en) * | 1976-03-23 | 1977-09-26 | Toshiba Corp | Approximating counter for use in time measurement |
| JPS5396657A (en) * | 1977-02-02 | 1978-08-24 | Nec Corp | Digital frequency divider circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62500698A (en) * | 1984-10-29 | 1987-03-19 | アメリカン テレフオン アンド テレグラフ カムパニ− | Self-correcting frequency down-converter |
| JPH02186718A (en) * | 1989-01-13 | 1990-07-23 | Nec Corp | 1/3 frequency dividing circuit |
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