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JPS57130136A - Multiprocessor system - Google Patents

Multiprocessor system

Info

Publication number
JPS57130136A
JPS57130136A JP1549581A JP1549581A JPS57130136A JP S57130136 A JPS57130136 A JP S57130136A JP 1549581 A JP1549581 A JP 1549581A JP 1549581 A JP1549581 A JP 1549581A JP S57130136 A JPS57130136 A JP S57130136A
Authority
JP
Japan
Prior art keywords
receiving
bus
processor
control part
communication
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1549581A
Other languages
Japanese (ja)
Inventor
Hiroshi Onodera
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1549581A priority Critical patent/JPS57130136A/en
Publication of JPS57130136A publication Critical patent/JPS57130136A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE:To obtain easily a small-scale multiprocessor system corresponding to the number of processors, by constituting a system with bus system controllers and processor communication channels and giving a hierarchinal structure to system busses and performing interprocessing communication through a lower bus independently. CONSTITUTION:The command from a processor PRC starts the control part in a processor communication channel PCC, and the processing in the transmission/receiving mode is performed in a control information processing part. For example, in the transmission mode, data received preliminarily in a transfer data processing part is transmitted. When a transfer request is transferred to a bus controller BC, the control part in the device BC is started to prepare for receiving of control information. After receiving information, communication contents are discriminated. When receiving the transfer request, a bus master controller BMC selects only one request as prescribed to start the control part in the device BMC. If an abnormality occurs, it is reported to the pertinent processor PRC.
JP1549581A 1981-02-04 1981-02-04 Multiprocessor system Pending JPS57130136A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1549581A JPS57130136A (en) 1981-02-04 1981-02-04 Multiprocessor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1549581A JPS57130136A (en) 1981-02-04 1981-02-04 Multiprocessor system

Publications (1)

Publication Number Publication Date
JPS57130136A true JPS57130136A (en) 1982-08-12

Family

ID=11890386

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1549581A Pending JPS57130136A (en) 1981-02-04 1981-02-04 Multiprocessor system

Country Status (1)

Country Link
JP (1) JPS57130136A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59108162A (en) * 1982-12-14 1984-06-22 Matsushita Electric Ind Co Ltd Device for controlling hierarchical of multiprocessor
JPH09198355A (en) * 1997-03-07 1997-07-31 Hitachi Ltd Processor system
US5968150A (en) * 1986-03-12 1999-10-19 Hitachi, Ltd. Processor element having a plurality of CPUs for use in a multiple processor system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59108162A (en) * 1982-12-14 1984-06-22 Matsushita Electric Ind Co Ltd Device for controlling hierarchical of multiprocessor
US5968150A (en) * 1986-03-12 1999-10-19 Hitachi, Ltd. Processor element having a plurality of CPUs for use in a multiple processor system
JPH09198355A (en) * 1997-03-07 1997-07-31 Hitachi Ltd Processor system

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