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JPS57118407A - Amplifying circuit - Google Patents

Amplifying circuit

Info

Publication number
JPS57118407A
JPS57118407A JP56004025A JP402581A JPS57118407A JP S57118407 A JPS57118407 A JP S57118407A JP 56004025 A JP56004025 A JP 56004025A JP 402581 A JP402581 A JP 402581A JP S57118407 A JPS57118407 A JP S57118407A
Authority
JP
Japan
Prior art keywords
power supply
terminal
voltage
side power
negative side
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56004025A
Other languages
Japanese (ja)
Inventor
Mikio Bessho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56004025A priority Critical patent/JPS57118407A/en
Publication of JPS57118407A publication Critical patent/JPS57118407A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE: To facilitate the control by which the output voltage is set zero when the noninverse input voltage is positive for an amplifying circuit of an operational amplifier, by connecting a negative side power supply terminal to a negative terminal of a power supply via a resistor.
CONSTITUTION: For an operational amplifier 7, the noninverse input terminal voltage V14 is applied to an inverse input terminal 11 via a resistance (R)1, and the voltage of an output terminal 8 is fed back to the terminal 11 via an R2. The noninverse input terminal voltage V15 is applied to a noninverse input terminal 12 via an R3, and the terminal 12 is connected to the negative side power supply terminal of a driving power supply 6 via an R4. The positive side power supply terminal of a power supply 6 is connected to a positive side power supply terminal 9 of the amplifier 7, and a negative side power supply terminal 10 is connected to the negative side power supply terminal of the power supply 6 via an R5. And the voltage drop of the R5 is set at a sufficiently small value. In such constitution, the zero control of the voltage V8 is facilitated in a positive range of the voltage V15 with connection of a power supply 13 to eliminate the power supply 13. A transistor can substitute the R5.
COPYRIGHT: (C)1982,JPO&Japio
JP56004025A 1981-01-14 1981-01-14 Amplifying circuit Pending JPS57118407A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56004025A JPS57118407A (en) 1981-01-14 1981-01-14 Amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56004025A JPS57118407A (en) 1981-01-14 1981-01-14 Amplifying circuit

Publications (1)

Publication Number Publication Date
JPS57118407A true JPS57118407A (en) 1982-07-23

Family

ID=11573415

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56004025A Pending JPS57118407A (en) 1981-01-14 1981-01-14 Amplifying circuit

Country Status (1)

Country Link
JP (1) JPS57118407A (en)

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