JPS57116401A - Frequency multiplying circuit - Google Patents
Frequency multiplying circuitInfo
- Publication number
- JPS57116401A JPS57116401A JP56002431A JP243181A JPS57116401A JP S57116401 A JPS57116401 A JP S57116401A JP 56002431 A JP56002431 A JP 56002431A JP 243181 A JP243181 A JP 243181A JP S57116401 A JPS57116401 A JP S57116401A
- Authority
- JP
- Japan
- Prior art keywords
- time
- turns
- trs
- capacitor
- charged
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
- H03B19/06—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes
- H03B19/14—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes by means of a semiconductor device
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To multiply a frequency with extremely simple circuit constitution by turning on two common-collector transistors (TR) alternately for a certain time every time a capacitor is charged or discharged. CONSTITUTION:A transistor TR1 for signal input turns on and off for every time T in accordance with an input signal (a). A capacitor 4 is charged or discharged repeatedly each time the TR1 turns on or off; the charging is performed through a TR2 for time T1 after the TR1 turns off, and the discharging is performed through TRs 1 and 3 for time T2 after the TR1 turns on. Therefore, the TRs 2 and 3 turn on alternately for time periods T1 and T2 every time the capacitor 4 is charged or discharged, and the collectors of the TRs 2 and 3 are connected in common, so an output signal (b) having a frequency twice as high as that of the signal (a) appears at an output terminal 10 which is their common connection point.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56002431A JPS57116401A (en) | 1981-01-09 | 1981-01-09 | Frequency multiplying circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56002431A JPS57116401A (en) | 1981-01-09 | 1981-01-09 | Frequency multiplying circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57116401A true JPS57116401A (en) | 1982-07-20 |
Family
ID=11529067
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56002431A Pending JPS57116401A (en) | 1981-01-09 | 1981-01-09 | Frequency multiplying circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57116401A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0189902U (en) * | 1987-12-07 | 1989-06-13 |
-
1981
- 1981-01-09 JP JP56002431A patent/JPS57116401A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0189902U (en) * | 1987-12-07 | 1989-06-13 |
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