JPS57114283A - Non-volatile semiconductive memory - Google Patents
Non-volatile semiconductive memoryInfo
- Publication number
- JPS57114283A JPS57114283A JP135781A JP135781A JPS57114283A JP S57114283 A JPS57114283 A JP S57114283A JP 135781 A JP135781 A JP 135781A JP 135781 A JP135781 A JP 135781A JP S57114283 A JPS57114283 A JP S57114283A
- Authority
- JP
- Japan
- Prior art keywords
- drain
- source
- mos transistor
- regions
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Non-Volatile Memory (AREA)
- Read Only Memory (AREA)
Abstract
PURPOSE:To improve the data reading speed of a non-volatile semiconductor memory and to form ultrafine element by forming transistors for a memory cell and peripheral circuit in separated another semiconductor regions. CONSTITUTION:Two p-type well regions 12, 13 are isolated and formed in the surface region of a substrate 11. A pair of n<+>type regions 14, 15 becoming the drain and the source of an MOS transistor are formed at the prescribed interval on the surface region of one 12 of the well regions. A floating gate 16 and a control gate 17 form a double gate type MOS transistor with drain, source to become a memory cell. A pair of n<+>type regions 18, 19 becoming the drain and the source of an MOS transistor are formed at the prescribed interval on the surface region of the other 13 of the well regions. A gate 20 forms an MOS transistor with drain, source and peripheral circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP135781A JPS57114283A (en) | 1981-01-08 | 1981-01-08 | Non-volatile semiconductive memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP135781A JPS57114283A (en) | 1981-01-08 | 1981-01-08 | Non-volatile semiconductive memory |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57114283A true JPS57114283A (en) | 1982-07-16 |
JPH0127587B2 JPH0127587B2 (en) | 1989-05-30 |
Family
ID=11499241
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP135781A Granted JPS57114283A (en) | 1981-01-08 | 1981-01-08 | Non-volatile semiconductive memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57114283A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55156370A (en) * | 1979-05-25 | 1980-12-05 | Hitachi Ltd | Manufacture of semiconductor device |
-
1981
- 1981-01-08 JP JP135781A patent/JPS57114283A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55156370A (en) * | 1979-05-25 | 1980-12-05 | Hitachi Ltd | Manufacture of semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPH0127587B2 (en) | 1989-05-30 |
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