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JPS57112159A - Method for carrier regeneration - Google Patents

Method for carrier regeneration

Info

Publication number
JPS57112159A
JPS57112159A JP55185338A JP18533880A JPS57112159A JP S57112159 A JPS57112159 A JP S57112159A JP 55185338 A JP55185338 A JP 55185338A JP 18533880 A JP18533880 A JP 18533880A JP S57112159 A JPS57112159 A JP S57112159A
Authority
JP
Japan
Prior art keywords
components
outputted
inputted
error signal
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55185338A
Other languages
Japanese (ja)
Other versions
JPS6135742B2 (en
Inventor
Takayuki Ozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55185338A priority Critical patent/JPS57112159A/en
Publication of JPS57112159A publication Critical patent/JPS57112159A/en
Publication of JPS6135742B2 publication Critical patent/JPS6135742B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2273—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To obtain a carrier regenerating circuit which can be digitized and has the gain adjusting function, by setting small coordinate systems consisting of axes (x) and (y) in the normal orthogonal coordinate system consisting of axes X and Y and by regenerating a reference carrier on a basis of information of coordinate positions of respective receiving signal points in small coordinate systems. CONSTITUTION:An input four-phase PSK signal Sin is inputted to X and Y-axis phase detectors 33X and 33Y through an AGC amplifier 31, and X components and Y components are outputted. X and Y components are inputted to A/D converters ADX and ADY respectively and are digitized and are inputted to digital logic circuits 35-1-35-3. Logic circuits 35-1-35-3 discriminate a region where X and Y-axis components exist, and a phase error signal DELTAO is outputted to a VCO38 in case of a region indicated by solid lines, and an amplitude error signal DELTAA is outputted to the AGC amplifier 31 in case of a region indicated by broken lines. The polarity of each error signal is distinguished by the direction of lines. This technique is applied to the orthogonal amplitude modulation signal also.
JP55185338A 1980-12-29 1980-12-29 Method for carrier regeneration Granted JPS57112159A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55185338A JPS57112159A (en) 1980-12-29 1980-12-29 Method for carrier regeneration

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55185338A JPS57112159A (en) 1980-12-29 1980-12-29 Method for carrier regeneration

Publications (2)

Publication Number Publication Date
JPS57112159A true JPS57112159A (en) 1982-07-13
JPS6135742B2 JPS6135742B2 (en) 1986-08-14

Family

ID=16169046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55185338A Granted JPS57112159A (en) 1980-12-29 1980-12-29 Method for carrier regeneration

Country Status (1)

Country Link
JP (1) JPS57112159A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0104449A2 (en) * 1982-08-28 1984-04-04 Nec Corporation Quadrature amplitude demodulator comprising a combination of a full-wave rectifying circuit and binary detectors
EP0108358A2 (en) * 1982-10-30 1984-05-16 Nec Corporation Phase demodulator
JPS61225951A (en) * 1985-03-28 1986-10-07 エイ・ティ・アンド・ティ・コーポレーション Carrier recovery circuit

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62178066U (en) * 1986-01-14 1987-11-12
JPH0533255Y2 (en) * 1986-04-19 1993-08-24

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0104449A2 (en) * 1982-08-28 1984-04-04 Nec Corporation Quadrature amplitude demodulator comprising a combination of a full-wave rectifying circuit and binary detectors
EP0108358A2 (en) * 1982-10-30 1984-05-16 Nec Corporation Phase demodulator
JPS61225951A (en) * 1985-03-28 1986-10-07 エイ・ティ・アンド・ティ・コーポレーション Carrier recovery circuit

Also Published As

Publication number Publication date
JPS6135742B2 (en) 1986-08-14

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