JPS5696847A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5696847A JPS5696847A JP6375480A JP6375480A JPS5696847A JP S5696847 A JPS5696847 A JP S5696847A JP 6375480 A JP6375480 A JP 6375480A JP 6375480 A JP6375480 A JP 6375480A JP S5696847 A JPS5696847 A JP S5696847A
- Authority
- JP
- Japan
- Prior art keywords
- width
- pellet
- lead
- transistor
- terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To obtain a frame capable of being commonly used for a base-centered transistor and a collector-centered transistor by dividing the width of a mounting part formed at a lead frame into necessary widths for a pellet part, a bonding part and a lead terminal part and connecting them together. CONSTITUTION:The lead frame 1' is formed of wind width parts A1, B1, C1 and lead terminals A3, B2, C2 extended therefrom, and the terminals are connected with tie plates to be separated later. In this configuration the part A2 connected to the part A1 and the lead terminal A3 are formed in L shape, the width of the part A1 is formed to be sufficiently mounted with the pellet in width, and the width if the part A2 is formed to be sufficiently mounted with the bonding pad in width. Thereafter the part A1 or B1 is selected in response to the type of the transistor, the pellet is mounted thereon, and the part 4' containing the pellet is molded with resin while exposing the lead terminals.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6375480A JPS5696847A (en) | 1980-05-14 | 1980-05-14 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6375480A JPS5696847A (en) | 1980-05-14 | 1980-05-14 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5696847A true JPS5696847A (en) | 1981-08-05 |
Family
ID=13238493
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6375480A Pending JPS5696847A (en) | 1980-05-14 | 1980-05-14 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5696847A (en) |
-
1980
- 1980-05-14 JP JP6375480A patent/JPS5696847A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5662351A (en) | Semiconductor device for memory | |
JPS5521128A (en) | Lead frame used for semiconductor device and its assembling | |
IE832368L (en) | A plastics moulded semiconductor device | |
JPS57147260A (en) | Manufacture of resin-sealed semiconductor device and lead frame used therefor | |
JPS55163868A (en) | Lead frame and semiconductor device using the same | |
JPS5559749A (en) | Lead frame | |
JPS5696847A (en) | Semiconductor device | |
JPS54124677A (en) | Semiconductor device | |
JPS51138179A (en) | Semi-conductor device | |
JPS56158462A (en) | Lead frame for single inline semiconductor device | |
JPS5788752A (en) | Lead frame and semiconductor device prepared by using the same | |
JPS55127032A (en) | Plastic molded type semiconductor device | |
JPS57114263A (en) | Semiconductor device | |
JPS5649547A (en) | Manufacture of semiconductor device | |
JPS54119877A (en) | Semiconductor device | |
JPS57154863A (en) | Manufacture of resin sealing type electronic parts | |
JPS55107252A (en) | Manufacture of semiconductor device | |
JPS56122154A (en) | Semiconductor device | |
JPS54152867A (en) | Lead frame | |
JPS554984A (en) | Resin-sealing metal mold for semiconductor device | |
JPS55163867A (en) | Lead frame for semiconductor device | |
JPS55154757A (en) | Smiconductor device and manufacture of the same | |
JPS5662350A (en) | Semiconductor device for memory | |
JPS5723254A (en) | Semiconductor device | |
JPS57202745A (en) | Manufacture of semiconductor device |