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JPS5694736A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device

Info

Publication number
JPS5694736A
JPS5694736A JP17102479A JP17102479A JPS5694736A JP S5694736 A JPS5694736 A JP S5694736A JP 17102479 A JP17102479 A JP 17102479A JP 17102479 A JP17102479 A JP 17102479A JP S5694736 A JPS5694736 A JP S5694736A
Authority
JP
Japan
Prior art keywords
layer
semiconductor substrate
micron
wax
gold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17102479A
Other languages
Japanese (ja)
Other versions
JPS5846167B2 (en
Inventor
Minoru Matsumoto
Shunji Kashiwagi
Masanori Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54171024A priority Critical patent/JPS5846167B2/en
Publication of JPS5694736A publication Critical patent/JPS5694736A/en
Publication of JPS5846167B2 publication Critical patent/JPS5846167B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
    • H01L23/4827Materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To form an electrode having an excellent adhesion and heat conductivity by a method wherein a metallic material composed of a matallic layer is coated to a rear side of a semiconductor substrate formed into an element and an eutectic reaction is performed by applying a heat treatment. CONSTITUTION:A wax 17 is applied to the surface of a semiconductor substrate 11 in which a bipolar transistor is formed and it is secured to a glass substrate 18. Next thereto, the rear face of the substrate 11 is ground upto a thickness of 30 micron or less and a nichrome layer 19 of 500Angstrom and a gold-antimony layer 20 of 2,000Angstrom are sequentially coated to it through an evaporation method. next thereto, taking a photoresist layer 21 as a mask, copper or silver layer 22 is plated with a thickness of 50-60 micron. Finally, removing the photoresist layer 21 and the wax 17, the semiconductor substrate 11 is treated through a heat of more than 370 deg.C of temperature. Performing in such a way, the gold-antimony layer 20 and the semiconductor substrate 11 are in an eutectic reaction and an electrode having a high adhesion and heat conductivity can be obtained.
JP54171024A 1979-12-28 1979-12-28 Manufacturing method of semiconductor device Expired JPS5846167B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54171024A JPS5846167B2 (en) 1979-12-28 1979-12-28 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54171024A JPS5846167B2 (en) 1979-12-28 1979-12-28 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5694736A true JPS5694736A (en) 1981-07-31
JPS5846167B2 JPS5846167B2 (en) 1983-10-14

Family

ID=15915668

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54171024A Expired JPS5846167B2 (en) 1979-12-28 1979-12-28 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5846167B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006046789A1 (en) * 2006-10-02 2008-04-03 Infineon Technologies Ag Electronic component e.g. isolated gate bipolar transistor, has layer region that is electrically conductively arranged at thinned wafers, where layer thickness of layer region is larger than specific micrometers
CN102522326A (en) * 2011-12-14 2012-06-27 杭州立昂微电子股份有限公司 Production method of semiconductor discrete device back side metal suitable for screen printing

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6069802U (en) * 1983-10-13 1985-05-17 笠井 琴雄 variable pressure regulator
JPH07133889A (en) * 1993-11-10 1995-05-23 Kato Spring Seisakusho:Kk Contraflow prevention connector
JP6119677B2 (en) 2014-06-16 2017-04-26 株式会社デンソー High pressure pump

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4855664A (en) * 1971-11-12 1973-08-04
JPS5023173A (en) * 1973-06-28 1975-03-12

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4855664A (en) * 1971-11-12 1973-08-04
JPS5023173A (en) * 1973-06-28 1975-03-12

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006046789A1 (en) * 2006-10-02 2008-04-03 Infineon Technologies Ag Electronic component e.g. isolated gate bipolar transistor, has layer region that is electrically conductively arranged at thinned wafers, where layer thickness of layer region is larger than specific micrometers
US7582513B2 (en) 2006-10-02 2009-09-01 Infineon Technologies Ag Electronic device and method for producing electronic devices
CN102522326A (en) * 2011-12-14 2012-06-27 杭州立昂微电子股份有限公司 Production method of semiconductor discrete device back side metal suitable for screen printing

Also Published As

Publication number Publication date
JPS5846167B2 (en) 1983-10-14

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