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JPS5690346A - Address control system of microprogram - Google Patents

Address control system of microprogram

Info

Publication number
JPS5690346A
JPS5690346A JP16794579A JP16794579A JPS5690346A JP S5690346 A JPS5690346 A JP S5690346A JP 16794579 A JP16794579 A JP 16794579A JP 16794579 A JP16794579 A JP 16794579A JP S5690346 A JPS5690346 A JP S5690346A
Authority
JP
Japan
Prior art keywords
circuit
address
microprogram
control system
selecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16794579A
Other languages
Japanese (ja)
Inventor
Naotoshi Ukai
Katsunobu Miyake
Haruo Wakabayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP16794579A priority Critical patent/JPS5690346A/en
Publication of JPS5690346A publication Critical patent/JPS5690346A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To designate 3 or more addresses by 1 step cycle, by additionally installing an address designating register in a sequence control circuit.
CONSTITUTION: The selecting circuit 7, 8 and the address designating register 9, 10 are additionally installed to the sequence control circuit 2. 4 address routes of these registers 9, 10 and circuits 7, 8 are designated by 1 step. And, when the selecting circuit and the address designating register are further increased, and the proper operation is executed by the selecting and designating circuit 3, much more addresses can be designated by 1 microstep. Accordingly, the high speed processing operation is executed.
COPYRIGHT: (C)1981,JPO&Japio
JP16794579A 1979-12-24 1979-12-24 Address control system of microprogram Pending JPS5690346A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16794579A JPS5690346A (en) 1979-12-24 1979-12-24 Address control system of microprogram

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16794579A JPS5690346A (en) 1979-12-24 1979-12-24 Address control system of microprogram

Publications (1)

Publication Number Publication Date
JPS5690346A true JPS5690346A (en) 1981-07-22

Family

ID=15858954

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16794579A Pending JPS5690346A (en) 1979-12-24 1979-12-24 Address control system of microprogram

Country Status (1)

Country Link
JP (1) JPS5690346A (en)

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