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JPS5690341A - Buffer switching system - Google Patents

Buffer switching system

Info

Publication number
JPS5690341A
JPS5690341A JP16800879A JP16800879A JPS5690341A JP S5690341 A JPS5690341 A JP S5690341A JP 16800879 A JP16800879 A JP 16800879A JP 16800879 A JP16800879 A JP 16800879A JP S5690341 A JPS5690341 A JP S5690341A
Authority
JP
Japan
Prior art keywords
area
address
buffer
read
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16800879A
Other languages
Japanese (ja)
Other versions
JPS5856889B2 (en
Inventor
Hideki Sugiyama
Masayoshi Ichimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16800879A priority Critical patent/JPS5856889B2/en
Publication of JPS5690341A publication Critical patent/JPS5690341A/en
Publication of JPS5856889B2 publication Critical patent/JPS5856889B2/en
Expired legal-status Critical Current

Links

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  • Information Transfer Systems (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE: To simplify the circuit configuration by storing the head addresses of two buffers, and executing the buffer switching by means of changing these head addresses.
CONSTITUTION: When the switching circuit 2 has been connected to the contact (a) side, the head address (a) of the buffer area A, and the head address (b) of the buffer area B are stored in the write address register P and the read address register Q, respectively. On the contrary, when connected to the contact (b) side, the address (b) and the address (a) are stored in the register P and the register Q, respectively. When the circuit 2 has been connected to the contact (a), a data from the input terminal 1 is stored in the area A, a data in the area B is read out by the read-out part 5, and it is sent out from the output terminal 7. Subsequently, when the circuit 2 has been connected to the contact (b) side, as for the write buffer, the area B is addressed. Also, as for the read buffer, the area A is addressed, and data write/read are executed.
COPYRIGHT: (C)1981,JPO&Japio
JP16800879A 1979-12-24 1979-12-24 Buffer switching method Expired JPS5856889B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16800879A JPS5856889B2 (en) 1979-12-24 1979-12-24 Buffer switching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16800879A JPS5856889B2 (en) 1979-12-24 1979-12-24 Buffer switching method

Publications (2)

Publication Number Publication Date
JPS5690341A true JPS5690341A (en) 1981-07-22
JPS5856889B2 JPS5856889B2 (en) 1983-12-17

Family

ID=15860085

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16800879A Expired JPS5856889B2 (en) 1979-12-24 1979-12-24 Buffer switching method

Country Status (1)

Country Link
JP (1) JPS5856889B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5949624A (en) * 1982-09-15 1984-03-22 Omron Tateisi Electronics Co Data transfer device
JPS608970A (en) * 1983-06-29 1985-01-17 Fuji Electric Co Ltd Multi-controller system
JPS60251452A (en) * 1984-05-28 1985-12-12 Kokusai Electric Co Ltd Continuous i/o transfer method of high speed circuit data
JPS6158359A (en) * 1984-08-30 1986-03-25 Toshiba Corp Data transmission equipment
JPS61272855A (en) * 1985-05-29 1986-12-03 Fujitsu Ltd Interruption request stack control system
JPS6385210U (en) * 1986-11-25 1988-06-03
JPS63175190A (en) * 1987-01-08 1988-07-19 横河電機株式会社 Control apparatus of papermaking machine or coating machine
JP2003051858A (en) * 2001-08-06 2003-02-21 Clarion Co Ltd Serial transmission device and transmission buffering control procedure of serial transmission device

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5949624A (en) * 1982-09-15 1984-03-22 Omron Tateisi Electronics Co Data transfer device
JPS608970A (en) * 1983-06-29 1985-01-17 Fuji Electric Co Ltd Multi-controller system
JPH0160864B2 (en) * 1983-06-29 1989-12-26 Fuji Denki Kk
JPS60251452A (en) * 1984-05-28 1985-12-12 Kokusai Electric Co Ltd Continuous i/o transfer method of high speed circuit data
JPS6158359A (en) * 1984-08-30 1986-03-25 Toshiba Corp Data transmission equipment
JPS61272855A (en) * 1985-05-29 1986-12-03 Fujitsu Ltd Interruption request stack control system
JPS6385210U (en) * 1986-11-25 1988-06-03
JPH0536406Y2 (en) * 1986-11-25 1993-09-14
JPS63175190A (en) * 1987-01-08 1988-07-19 横河電機株式会社 Control apparatus of papermaking machine or coating machine
JP2003051858A (en) * 2001-08-06 2003-02-21 Clarion Co Ltd Serial transmission device and transmission buffering control procedure of serial transmission device
JP4680440B2 (en) * 2001-08-06 2011-05-11 クラリオン株式会社 Serial transmission apparatus and transmission buffering control method for serial transmission apparatus

Also Published As

Publication number Publication date
JPS5856889B2 (en) 1983-12-17

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