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JPS5688340A - Heat resistant electrode and manufacture thereof - Google Patents

Heat resistant electrode and manufacture thereof

Info

Publication number
JPS5688340A
JPS5688340A JP16556879A JP16556879A JPS5688340A JP S5688340 A JPS5688340 A JP S5688340A JP 16556879 A JP16556879 A JP 16556879A JP 16556879 A JP16556879 A JP 16556879A JP S5688340 A JPS5688340 A JP S5688340A
Authority
JP
Japan
Prior art keywords
layer
temperature
substrate
alloy
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16556879A
Other languages
Japanese (ja)
Other versions
JPS6217379B2 (en
Inventor
Hajime Terakado
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP16556879A priority Critical patent/JPS5688340A/en
Publication of JPS5688340A publication Critical patent/JPS5688340A/en
Publication of JPS6217379B2 publication Critical patent/JPS6217379B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01049—Indium [In]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01051—Antimony [Sb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To prevent the deterioration of a semispherical bump electrode formed through foundation electrode layer of Au-Ag alloy on an Si substrate at a high temperature by forming the bump electrode therethrough on the substrate. CONSTITUTION:A window is opened atn an SiO2 film 3 on a P type layer 2 of an N type Si substrate 1, and an Au layer 4 is selectively evaporated at a temperature lower than 370 deg.C of Au-Si eutectic temperature. Infinitesimal amount of Ga is contained in the Au layer, thereby improving the ohmic property thereof. Further, an Ag layer is accumulated approximately in the amount of 3.5-10 times of the volume of the Au layer by evaporation at a temperature lower than the eutective temperature. Subsequently, it is treated for desired time at a temperature lower than the eutectic temperature, and an alloy layer 10 is formed by the mutual diffusion of the Au and the Ag. Then, the Ag semispherical bump electrode 5 is laminated thereon, and an Au layer 7 and an Ag layer 8 containing Sb are laminated on the lower surface of the substrate 1. Since the ternary alloy of the Au-Ag alloy and Si has an eutectic temperature sufficiently higher than the glass sealing temperature, the electrode is not deteriorated even at high temperature of 650-700 deg.C.
JP16556879A 1979-12-21 1979-12-21 Heat resistant electrode and manufacture thereof Granted JPS5688340A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16556879A JPS5688340A (en) 1979-12-21 1979-12-21 Heat resistant electrode and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16556879A JPS5688340A (en) 1979-12-21 1979-12-21 Heat resistant electrode and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS5688340A true JPS5688340A (en) 1981-07-17
JPS6217379B2 JPS6217379B2 (en) 1987-04-17

Family

ID=15814827

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16556879A Granted JPS5688340A (en) 1979-12-21 1979-12-21 Heat resistant electrode and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS5688340A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213145A (en) * 1983-05-18 1984-12-03 Toshiba Corp Semiconductor device and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213145A (en) * 1983-05-18 1984-12-03 Toshiba Corp Semiconductor device and manufacture thereof

Also Published As

Publication number Publication date
JPS6217379B2 (en) 1987-04-17

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