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JPS5685841A - Semiconductor element - Google Patents

Semiconductor element

Info

Publication number
JPS5685841A
JPS5685841A JP16154379A JP16154379A JPS5685841A JP S5685841 A JPS5685841 A JP S5685841A JP 16154379 A JP16154379 A JP 16154379A JP 16154379 A JP16154379 A JP 16154379A JP S5685841 A JPS5685841 A JP S5685841A
Authority
JP
Japan
Prior art keywords
film
layer
electrode
substrate
sio2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16154379A
Other languages
Japanese (ja)
Inventor
Seiichi Ishii
Kenji Matsuura
Setsuo Kuwatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP16154379A priority Critical patent/JPS5685841A/en
Publication of JPS5685841A publication Critical patent/JPS5685841A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01051—Antimony [Sb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To improve the withstand voltage of a semiconductor element by covering the peripheral edge of an underground electrode filled in a hole formed at an insulating layer with an insulating protective film. CONSTITUTION:An N<+> type layer 20 and a P type layer 24 are formed on an N type Si substrate as prescribed, a window is opened at an SiO2 film 25, an underground electrode 28 of Ga-doped Au layers 26 and 27 is selectively formed at the center. After the peripheral edge of the electrode 28 is so covered with an SiO2 film 30 as to block a gap 29, a resist mask 31 is formed, a window is opened at the film 30, Ag is plated thereon, and a bump electrode 32 is thus formed. It is temporarily stopped on the way, a mask having different bore is again formed thereon with wax 33, an Ag plating is then continued thereby completing a large bump 32, and the masks 30, 31 are then removed. An Au layer 34 and an Ag layer 35 containing Sb are laminated on the back surface of the substrate. With this configuration the gap 29 is blocked with the protective film, and the Ag is coated onto the insulating film of SiO2 or the like better than the Au or the like. Accordingly, the front surface of the Si substrate is not contaminated with sealing or the like at the time of plating, and a reverse direction leakage will not almost occur, and the withstand voltage thereof can be improved.
JP16154379A 1979-12-14 1979-12-14 Semiconductor element Pending JPS5685841A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16154379A JPS5685841A (en) 1979-12-14 1979-12-14 Semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16154379A JPS5685841A (en) 1979-12-14 1979-12-14 Semiconductor element

Publications (1)

Publication Number Publication Date
JPS5685841A true JPS5685841A (en) 1981-07-13

Family

ID=15737094

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16154379A Pending JPS5685841A (en) 1979-12-14 1979-12-14 Semiconductor element

Country Status (1)

Country Link
JP (1) JPS5685841A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213145A (en) * 1983-05-18 1984-12-03 Toshiba Corp Semiconductor device and manufacture thereof
JPS6441247A (en) * 1987-08-07 1989-02-13 Nec Corp Forming method for bump electrode

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5012284U (en) * 1973-05-29 1975-02-07

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5012284U (en) * 1973-05-29 1975-02-07

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213145A (en) * 1983-05-18 1984-12-03 Toshiba Corp Semiconductor device and manufacture thereof
JPS6441247A (en) * 1987-08-07 1989-02-13 Nec Corp Forming method for bump electrode

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