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JPS5664667A - Semiconductor integrated circuit system - Google Patents

Semiconductor integrated circuit system

Info

Publication number
JPS5664667A
JPS5664667A JP14064479A JP14064479A JPS5664667A JP S5664667 A JPS5664667 A JP S5664667A JP 14064479 A JP14064479 A JP 14064479A JP 14064479 A JP14064479 A JP 14064479A JP S5664667 A JPS5664667 A JP S5664667A
Authority
JP
Japan
Prior art keywords
register
timing signal
supplied
integrated circuit
timing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14064479A
Other languages
Japanese (ja)
Other versions
JPS6210389B2 (en
Inventor
Tsutomu Miyazaki
Sumitoshi Shirasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP14064479A priority Critical patent/JPS5664667A/en
Publication of JPS5664667A publication Critical patent/JPS5664667A/en
Publication of JPS6210389B2 publication Critical patent/JPS6210389B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE: To reduce a test time by a method wherein timing signals are supplied to each function part by means of a signal selection circuit and thus, reducing the number of test steps during a function test time.
CONSTITUTION: Each of data multiplexers 10W14 is inserted in each route of a timing signals which are sent from a timing signal generation circuit 9 to a bus buffer 1, a memory 4, a program counter 5, an A register 7, and a B register 8, respectively, and then, a timing signal from the timing signal generation circuit 9 is supplied to an input terminal of each of data multiplexers 10W14 and another timing signal is supplied to the other input terminal, thus, making the bus buffer 1 or the B register 8 operate by means of two system timing signals, respectively.
COPYRIGHT: (C)1981,JPO&Japio
JP14064479A 1979-10-31 1979-10-31 Semiconductor integrated circuit system Granted JPS5664667A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14064479A JPS5664667A (en) 1979-10-31 1979-10-31 Semiconductor integrated circuit system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14064479A JPS5664667A (en) 1979-10-31 1979-10-31 Semiconductor integrated circuit system

Publications (2)

Publication Number Publication Date
JPS5664667A true JPS5664667A (en) 1981-06-01
JPS6210389B2 JPS6210389B2 (en) 1987-03-05

Family

ID=15273452

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14064479A Granted JPS5664667A (en) 1979-10-31 1979-10-31 Semiconductor integrated circuit system

Country Status (1)

Country Link
JP (1) JPS5664667A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4787064A (en) * 1982-12-23 1988-11-22 Siemens Aktiengesellschaft Circuit module with interface circuits for connecting to plurality of busses operating in different operating modes

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4787064A (en) * 1982-12-23 1988-11-22 Siemens Aktiengesellschaft Circuit module with interface circuits for connecting to plurality of busses operating in different operating modes

Also Published As

Publication number Publication date
JPS6210389B2 (en) 1987-03-05

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