JPS5637670A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a high withstand semiconductor device which has high mass productivity and reliability by forming at a part of the end of an P-N junction structure forming the device of a mesa architecture and at the other part of the end thereof of a recess curvature shape on a plane as seen from the side of a conductivity type layer different from the substrate. CONSTITUTION:An anisotropic ethcing is conducted on one conductivity type Si substrate 1 having relatively low impurity density, and four rectilinear V-shaped grooves 4 are formed at an interval at the end thereof with each other. Then, a reverse conductivity type high impurity density region 2 is diffused or formed by an ion implantation in the substrate 1 of the portion surrounded by these grooves 5, and P-N junctions are thus formed. At this time the region 2 disposed at the ends of the four grooves 2 perpendicularly intersecting each other has the shape of recess curvature portion 6 on a plane pattern as seen from the side of the region 2 by utilizing the interval formed thereat. Thus, since the end of reverse curvature to the ordinary planar architecture curvature is provided thereat, high withstand voltage can be obtained thereat.