JPS56169973A - Automatic gain controlling device - Google Patents
Automatic gain controlling deviceInfo
- Publication number
- JPS56169973A JPS56169973A JP7276980A JP7276980A JPS56169973A JP S56169973 A JPS56169973 A JP S56169973A JP 7276980 A JP7276980 A JP 7276980A JP 7276980 A JP7276980 A JP 7276980A JP S56169973 A JPS56169973 A JP S56169973A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- fed
- automatic gain
- component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/52—Automatic gain control
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Receiver Circuits (AREA)
- Television Systems (AREA)
- Control Of Amplification And Gain Control (AREA)
Abstract
PURPOSE:To accomplish a picture of accurate multiplex-character, by controlling the gain of a video amplifier circuit through the automatic gain signal of AC and DC components derived from a clock line signal picked up from a video signal. CONSTITUTION:A clock line signal of character multiplex signal outputted from a video amplifier circuit 13 is fed to an analog switch 12 through a buffer amplifier 21 and the clock line signal only is picked up. This signal is split into two, one is fed to a 2.86MHz resonance circuit 23, the component in 2.86MHz only is obtained at the output and amplified 24 and fed to a peak hold amplifier circuit 25. The output of this circuit is fed back to a circuit 13 as an AC component automatic gain control signal 17a, allowing to make the automatic gain control of the AC component. Further, another clock line signal is fed to a 358kHz resonance circuit 26, and a DC component gain signal 17b is fed back to the circuit 13 from an amplifier circuit 28. Thus, the amplitude level and DC level of the character multiplex signal is stabilized.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7276980A JPS56169973A (en) | 1980-06-02 | 1980-06-02 | Automatic gain controlling device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7276980A JPS56169973A (en) | 1980-06-02 | 1980-06-02 | Automatic gain controlling device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56169973A true JPS56169973A (en) | 1981-12-26 |
| JPH0160987B2 JPH0160987B2 (en) | 1989-12-26 |
Family
ID=13498905
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7276980A Granted JPS56169973A (en) | 1980-06-02 | 1980-06-02 | Automatic gain controlling device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56169973A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5383526A (en) * | 1976-12-28 | 1978-07-24 | Matsushita Electric Ind Co Ltd | Receiving device for multiple information signal |
| JPS53139923A (en) * | 1977-05-13 | 1978-12-06 | Matsushita Electric Ind Co Ltd | Automatic gain control unit |
| JPS5459027A (en) * | 1977-10-19 | 1979-05-12 | Matsushita Electric Ind Co Ltd | Receiving device for multiplied information signal |
-
1980
- 1980-06-02 JP JP7276980A patent/JPS56169973A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5383526A (en) * | 1976-12-28 | 1978-07-24 | Matsushita Electric Ind Co Ltd | Receiving device for multiple information signal |
| JPS53139923A (en) * | 1977-05-13 | 1978-12-06 | Matsushita Electric Ind Co Ltd | Automatic gain control unit |
| JPS5459027A (en) * | 1977-10-19 | 1979-05-12 | Matsushita Electric Ind Co Ltd | Receiving device for multiplied information signal |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0160987B2 (en) | 1989-12-26 |
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