JPS56161735A - Signal transmission circuit - Google Patents
Signal transmission circuitInfo
- Publication number
- JPS56161735A JPS56161735A JP6510680A JP6510680A JPS56161735A JP S56161735 A JPS56161735 A JP S56161735A JP 6510680 A JP6510680 A JP 6510680A JP 6510680 A JP6510680 A JP 6510680A JP S56161735 A JPS56161735 A JP S56161735A
- Authority
- JP
- Japan
- Prior art keywords
- terminals
- switching
- sets
- time slot
- signal transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000008054 signal transmission Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J4/00—Combined time-division and frequency-division multiplex systems
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
Abstract
PURPOSE:To obtain the maximum ability of amplifiers at all times, by inputting signals having (n+1) types of frequencies while switching it to 2<n> sets of power amplifiers, and obtaining the amplified outputs of each frequency from (n+1) sets of output terminals while switching the outputs. CONSTITUTION:For example, in case of n=2, signals in (n+1) types of frequencies f0-fn are applied to input terminals 1-4 of 2<n> sets of power amplifiers 5-8 with the time slot as shown in figure. A signal f0 is inputted to the terminals 1-4 at time slot t0, it is inputted to the terminals 1-2 at t1, f1 is 3-4, and f0 is to the terminals 1-2, f1 is to 3 and f2 is to 4 at time slot t2, respectively. Change-over devices 9-12, 16, 17 are switched depending on the time slots t0-t2 and connected to synthesizers 13-15 and filters 18-20. This switching is made so that the amplified outputs f0-f2 can be obtained to output terminals 21-23 in the output time slots as shown in figure.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6510680A JPS56161735A (en) | 1980-05-16 | 1980-05-16 | Signal transmission circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6510680A JPS56161735A (en) | 1980-05-16 | 1980-05-16 | Signal transmission circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56161735A true JPS56161735A (en) | 1981-12-12 |
JPS642257B2 JPS642257B2 (en) | 1989-01-17 |
Family
ID=13277305
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6510680A Granted JPS56161735A (en) | 1980-05-16 | 1980-05-16 | Signal transmission circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56161735A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6436134A (en) * | 1987-07-31 | 1989-02-07 | Nec Corp | Transmission power amplifying circuit |
JPH0239641A (en) * | 1988-06-16 | 1990-02-08 | Hughes Aircraft Co | Time sharing fine aperture satellite terminal |
-
1980
- 1980-05-16 JP JP6510680A patent/JPS56161735A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6436134A (en) * | 1987-07-31 | 1989-02-07 | Nec Corp | Transmission power amplifying circuit |
JPH0239641A (en) * | 1988-06-16 | 1990-02-08 | Hughes Aircraft Co | Time sharing fine aperture satellite terminal |
Also Published As
Publication number | Publication date |
---|---|
JPS642257B2 (en) | 1989-01-17 |
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