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JPS56157538A - Data processing system of advanced mode control - Google Patents

Data processing system of advanced mode control

Info

Publication number
JPS56157538A
JPS56157538A JP6128580A JP6128580A JPS56157538A JP S56157538 A JPS56157538 A JP S56157538A JP 6128580 A JP6128580 A JP 6128580A JP 6128580 A JP6128580 A JP 6128580A JP S56157538 A JPS56157538 A JP S56157538A
Authority
JP
Japan
Prior art keywords
interruption
mode control
instruction
advanced mode
generated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6128580A
Other languages
Japanese (ja)
Other versions
JPS6122818B2 (en
Inventor
Keiichiro Uchida
Tetsuo Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6128580A priority Critical patent/JPS56157538A/en
Publication of JPS56157538A publication Critical patent/JPS56157538A/en
Publication of JPS6122818B2 publication Critical patent/JPS6122818B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)

Abstract

PURPOSE:To shorten the processing time as the whole, by selecting and registering an interruption of the highest priority level for interruption causes generated in parallel to recognize instructions which interrption causes are generated in accordance with. CONSTITUTION:In the advanced mode control mode for arithmetic logical units 7-1-7-3, it is reported to an advanced mode control indication register 1, and an instruction fetch part 3, etc. are controlled by an advanced mode control part 2 to add the instruction word length to the just preceding instruction address, and an instruction is fetched by the result. Next, instructions fetched successively are set in execution queuing registers 4-1-4-3 in order, and IDs are set in sequential ID set parts 5-1-5-3. Processing are executed in parallel by the units 7-1-7-3; and when an operation exception or the like occurs, an interruption is generated from pertinent one of the units 7-1-7-3 an interruption control part 8 and the control part 2, and a new instruction is prevented from being set, and the interruption processing is executed in the order of IDs.
JP6128580A 1980-05-09 1980-05-09 Data processing system of advanced mode control Granted JPS56157538A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6128580A JPS56157538A (en) 1980-05-09 1980-05-09 Data processing system of advanced mode control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6128580A JPS56157538A (en) 1980-05-09 1980-05-09 Data processing system of advanced mode control

Publications (2)

Publication Number Publication Date
JPS56157538A true JPS56157538A (en) 1981-12-04
JPS6122818B2 JPS6122818B2 (en) 1986-06-03

Family

ID=13166769

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6128580A Granted JPS56157538A (en) 1980-05-09 1980-05-09 Data processing system of advanced mode control

Country Status (1)

Country Link
JP (1) JPS56157538A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58106641A (en) * 1981-12-18 1983-06-25 Fujitsu Ltd Pipeline instruction execution controlling system
JPS61180370A (en) * 1986-01-10 1986-08-13 Hitachi Ltd Data processor
JPS622329A (en) * 1985-06-27 1987-01-08 Nec Corp Arithmetic exception instruction address calculation device
JPS622330A (en) * 1985-06-27 1987-01-08 Nec Corp Arithmetic exception instruction address calculating device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58106641A (en) * 1981-12-18 1983-06-25 Fujitsu Ltd Pipeline instruction execution controlling system
JPS622329A (en) * 1985-06-27 1987-01-08 Nec Corp Arithmetic exception instruction address calculation device
JPS622330A (en) * 1985-06-27 1987-01-08 Nec Corp Arithmetic exception instruction address calculating device
JPS61180370A (en) * 1986-01-10 1986-08-13 Hitachi Ltd Data processor

Also Published As

Publication number Publication date
JPS6122818B2 (en) 1986-06-03

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