JPS56130961A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS56130961A JPS56130961A JP3364580A JP3364580A JPS56130961A JP S56130961 A JPS56130961 A JP S56130961A JP 3364580 A JP3364580 A JP 3364580A JP 3364580 A JP3364580 A JP 3364580A JP S56130961 A JPS56130961 A JP S56130961A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- mask
- matching
- mask pattern
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 238000004519 manufacturing process Methods 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 230000010354 integration Effects 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 229920002120 photoresistant polymer Polymers 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 1
- 229920005591 polysilicon Polymers 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
- H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
- H10D84/209—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only resistors
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To improve the integration of a semiconductor device by forming a resistance layer on an insulating layer on the surface of a semiconductor substrate and concurrently matching and forming the resistance layer region with the same mask as a base layer region, thereby eliminating the error of matching the mask. CONSTITUTION:A silicon dioxide layer 9, a high purity polysilicon layer 10 and silicon nitride layer 11 are sequentially formed on an element region completing silicon substrate. Subsequently, a resistance layer of photoresist and a mask pattern of a base layer are formed by a photoprocessig step. The layer 11 is selectively etched to form a resistance layer mask pattern 12 and a base layer mask pattern 13 on the layer 10. Since the relative position of both the mask patterns is determined by the photoprocess in this case, it is accurate and the later steps do not require large mask allowance. Thus, the error of matching the masks can be reduced and the integration can be improved.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3364580A JPS56130961A (en) | 1980-03-17 | 1980-03-17 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3364580A JPS56130961A (en) | 1980-03-17 | 1980-03-17 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56130961A true JPS56130961A (en) | 1981-10-14 |
| JPH0140502B2 JPH0140502B2 (en) | 1989-08-29 |
Family
ID=12392174
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3364580A Granted JPS56130961A (en) | 1980-03-17 | 1980-03-17 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56130961A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03108755A (en) * | 1989-09-22 | 1991-05-08 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
-
1980
- 1980-03-17 JP JP3364580A patent/JPS56130961A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03108755A (en) * | 1989-09-22 | 1991-05-08 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0140502B2 (en) | 1989-08-29 |
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