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JPS5578363A - Memory area set system - Google Patents

Memory area set system

Info

Publication number
JPS5578363A
JPS5578363A JP15184878A JP15184878A JPS5578363A JP S5578363 A JPS5578363 A JP S5578363A JP 15184878 A JP15184878 A JP 15184878A JP 15184878 A JP15184878 A JP 15184878A JP S5578363 A JPS5578363 A JP S5578363A
Authority
JP
Japan
Prior art keywords
area
data
program
ram2
data area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15184878A
Other languages
Japanese (ja)
Inventor
Tomohiro Shimizu
Yoshinobu Muranaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP15184878A priority Critical patent/JPS5578363A/en
Publication of JPS5578363A publication Critical patent/JPS5578363A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to start easily data transfer between a designated program or data area and an external device by designating automatically one area of a program area and a data area when operation modes are switched.
CONSTITUTION: RAM2 which has the program area for program data and the data area for numeric data and CPU1 which designates a line address and a column address of RAM2 are provided, and further, area selection circuit 8 is provided which designates one of the program area and the data area of RAM2 according to an operation mode designated by CPU1. Further, program counter 4 is provided which outputs bit signals S1WS8 to designate an address in the program area and the data area of RAM2; and when operation modes are switched, one of the program area and the data area is designated automatically, and contents of data of RAM2 are transmitted to the external device through I/O port 3.
COPYRIGHT: (C)1980,JPO&Japio
JP15184878A 1978-12-08 1978-12-08 Memory area set system Pending JPS5578363A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15184878A JPS5578363A (en) 1978-12-08 1978-12-08 Memory area set system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15184878A JPS5578363A (en) 1978-12-08 1978-12-08 Memory area set system

Publications (1)

Publication Number Publication Date
JPS5578363A true JPS5578363A (en) 1980-06-12

Family

ID=15527585

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15184878A Pending JPS5578363A (en) 1978-12-08 1978-12-08 Memory area set system

Country Status (1)

Country Link
JP (1) JPS5578363A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5674761A (en) * 1979-11-22 1981-06-20 Hitachi Ltd Information processor
JPS5853072A (en) * 1981-09-24 1983-03-29 Hitachi Ltd Ram device
JPS6378288A (en) * 1986-09-22 1988-04-08 Kyodo Printing Co Ltd Ic card

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918537A (en) * 1972-06-14 1974-02-19
JPS4975228A (en) * 1972-11-24 1974-07-19
JPS49122232A (en) * 1973-03-22 1974-11-22
JPS5354426A (en) * 1976-10-28 1978-05-17 Sharp Corp Variable system of program area and data area of memory device
JPS53129547A (en) * 1977-04-18 1978-11-11 Hitachi Ltd Data processing system

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918537A (en) * 1972-06-14 1974-02-19
JPS4975228A (en) * 1972-11-24 1974-07-19
JPS49122232A (en) * 1973-03-22 1974-11-22
JPS5354426A (en) * 1976-10-28 1978-05-17 Sharp Corp Variable system of program area and data area of memory device
JPS53129547A (en) * 1977-04-18 1978-11-11 Hitachi Ltd Data processing system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5674761A (en) * 1979-11-22 1981-06-20 Hitachi Ltd Information processor
JPS5853072A (en) * 1981-09-24 1983-03-29 Hitachi Ltd Ram device
JPS6378288A (en) * 1986-09-22 1988-04-08 Kyodo Printing Co Ltd Ic card

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