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JPS5577054A - Speed control signal generation circuit of magnetic head - Google Patents

Speed control signal generation circuit of magnetic head

Info

Publication number
JPS5577054A
JPS5577054A JP14880678A JP14880678A JPS5577054A JP S5577054 A JPS5577054 A JP S5577054A JP 14880678 A JP14880678 A JP 14880678A JP 14880678 A JP14880678 A JP 14880678A JP S5577054 A JPS5577054 A JP S5577054A
Authority
JP
Japan
Prior art keywords
terminal
signal
magnetic head
control signal
generation circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14880678A
Other languages
Japanese (ja)
Inventor
Yoichiro Taki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14880678A priority Critical patent/JPS5577054A/en
Publication of JPS5577054A publication Critical patent/JPS5577054A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Velocity Or Acceleration (AREA)
  • Moving Of Head For Track Selection And Changing (AREA)

Abstract

PURPOSE: To generate an object speed of both polarities by giving a signal, which indicates the magnetic head movement direction, as an input to a ROM and controlling the polarity of the output of a D/A converter circuit on a basis of the signal above.
CONSTITUTION: One-bit input terminal 6 of ROM 3 is provided for polarity indication, and data with the most significant bit of "1" is stored in all addresses for which an address sent to terminal 6 is "1". Data with the most significant bit of "0" is stored in all addresses for which an address bit is "0". As the result, a positive voltage is generated at output terminal 5 of D/A converter 4 if logical signal "1" is applied to terminal 6 as an address signal, and a negative voltage is generated if signal "0" is applied to terminal 6. Thus, when "1" or "0" signal is applied to terminal 6 according to the magnetic head movement direction, an object speed signal of both polarities can be obtained from terminal 5.
COPYRIGHT: (C)1980,JPO&Japio
JP14880678A 1978-12-01 1978-12-01 Speed control signal generation circuit of magnetic head Pending JPS5577054A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14880678A JPS5577054A (en) 1978-12-01 1978-12-01 Speed control signal generation circuit of magnetic head

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14880678A JPS5577054A (en) 1978-12-01 1978-12-01 Speed control signal generation circuit of magnetic head

Publications (1)

Publication Number Publication Date
JPS5577054A true JPS5577054A (en) 1980-06-10

Family

ID=15461116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14880678A Pending JPS5577054A (en) 1978-12-01 1978-12-01 Speed control signal generation circuit of magnetic head

Country Status (1)

Country Link
JP (1) JPS5577054A (en)

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