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JPS5567986A - Memory unit - Google Patents

Memory unit

Info

Publication number
JPS5567986A
JPS5567986A JP14191578A JP14191578A JPS5567986A JP S5567986 A JPS5567986 A JP S5567986A JP 14191578 A JP14191578 A JP 14191578A JP 14191578 A JP14191578 A JP 14191578A JP S5567986 A JPS5567986 A JP S5567986A
Authority
JP
Japan
Prior art keywords
information
write
read
stored
memories
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14191578A
Other languages
Japanese (ja)
Other versions
JPS6230461B2 (en
Inventor
Michiaki Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14191578A priority Critical patent/JPS5567986A/en
Publication of JPS5567986A publication Critical patent/JPS5567986A/en
Publication of JPS6230461B2 publication Critical patent/JPS6230461B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE: To realize high-speed information transfer by providing information retaining method coupling in parallel with input and output methods for write and read information.
CONSTITUTION: According to high and low levels of clocks outputted by clock pulse generator WCG controlled through write latch circuit WR and write information selector circuit WX, respective bits of write information stored temporarily in buffer memories WD1... are stored in latch circuits WR1A... or WR1B connected to memories WD1... in parallel, and write information gate circuit WG1... are turned ON-OFF to control transfer of write information to memory M. Similarly, read information from memory M is stored in latch circuits RR1A... or RR1B... connected in parallel to buffer memories OB1... stored temporarily with respective bits of the read information and then transferred to memories OB1...; and it is written and read asynchronously and pooled temporarily in latch circuits. Then, a read and write are taken at the same time in write and read cycles to increase the transfer speed of information.
COPYRIGHT: (C)1980,JPO&Japio
JP14191578A 1978-11-17 1978-11-17 Memory unit Granted JPS5567986A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14191578A JPS5567986A (en) 1978-11-17 1978-11-17 Memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14191578A JPS5567986A (en) 1978-11-17 1978-11-17 Memory unit

Publications (2)

Publication Number Publication Date
JPS5567986A true JPS5567986A (en) 1980-05-22
JPS6230461B2 JPS6230461B2 (en) 1987-07-02

Family

ID=15303116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14191578A Granted JPS5567986A (en) 1978-11-17 1978-11-17 Memory unit

Country Status (1)

Country Link
JP (1) JPS5567986A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58203694A (en) * 1982-05-21 1983-11-28 Nec Corp Memory circuit
JPS60225971A (en) * 1984-04-25 1985-11-11 Ricoh Co Ltd Word processor
JPH04278286A (en) * 1991-03-07 1992-10-02 Mitsubishi Electric Corp Semiconductor memory and method for reading data therefrom

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4887741A (en) * 1972-02-18 1973-11-17
JPS5167117A (en) * 1974-12-09 1976-06-10 Hitachi Ltd KAITENTAIKI OKUSOCHINO JOHOTENSOSOCHI
JPS523345A (en) * 1975-06-25 1977-01-11 Advantest Corp Data memory
JPS53116050A (en) * 1977-03-18 1978-10-11 Matsushita Electric Ind Co Ltd Error correction unit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4887741A (en) * 1972-02-18 1973-11-17
JPS5167117A (en) * 1974-12-09 1976-06-10 Hitachi Ltd KAITENTAIKI OKUSOCHINO JOHOTENSOSOCHI
JPS523345A (en) * 1975-06-25 1977-01-11 Advantest Corp Data memory
JPS53116050A (en) * 1977-03-18 1978-10-11 Matsushita Electric Ind Co Ltd Error correction unit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58203694A (en) * 1982-05-21 1983-11-28 Nec Corp Memory circuit
JPH0237636B2 (en) * 1982-05-21 1990-08-27 Nippon Electric Co
JPS60225971A (en) * 1984-04-25 1985-11-11 Ricoh Co Ltd Word processor
JPH04278286A (en) * 1991-03-07 1992-10-02 Mitsubishi Electric Corp Semiconductor memory and method for reading data therefrom

Also Published As

Publication number Publication date
JPS6230461B2 (en) 1987-07-02

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