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JPS5547789A - Noise suppression circuit of pal system color encoder - Google Patents

Noise suppression circuit of pal system color encoder

Info

Publication number
JPS5547789A
JPS5547789A JP12122078A JP12122078A JPS5547789A JP S5547789 A JPS5547789 A JP S5547789A JP 12122078 A JP12122078 A JP 12122078A JP 12122078 A JP12122078 A JP 12122078A JP S5547789 A JPS5547789 A JP S5547789A
Authority
JP
Japan
Prior art keywords
chroma
phase
balance
output
noise suppression
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12122078A
Other languages
Japanese (ja)
Other versions
JPS5857954B2 (en
Inventor
Toshio Teramoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kokusai Denki Electric Inc
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP12122078A priority Critical patent/JPS5857954B2/en
Publication of JPS5547789A publication Critical patent/JPS5547789A/en
Publication of JPS5857954B2 publication Critical patent/JPS5857954B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE: To suppress the noise component in chroma signal, by providing the comb type filter to each balance modulator output side of each chroma signal channel and synthesizing the both channels after noise suppression for chroma signals R-Y and B-Y respectively.
CONSTITUTION: The chroma signals R-Y and B-Y from the matrix circuit are given to the balance modulators BM3 and BM4 respectively. In BM3, the phase of the chroma signal R-Y is inverted every 1H and balance modulation of chrominance subcarrier SC is made and the output of BM3 is in-phase appearantly. Further, in BM4, the chroma subscrrier SC is in balance modulation with the chroma signal B-Y and the phase of the output is inverted every 1H. At the output of BM3 and BM4, the comb type filters CF1 and CF2 providing the delay circuits DL3 and DL4 having delay time of 1H are placed. Since the phase of R-Y given is the same at CF1, it can be added with R-Y immediately before with the adder AD.
COPYRIGHT: (C)1980,JPO&Japio
JP12122078A 1978-10-03 1978-10-03 PAL color encoder noise suppression circuit Expired JPS5857954B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12122078A JPS5857954B2 (en) 1978-10-03 1978-10-03 PAL color encoder noise suppression circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12122078A JPS5857954B2 (en) 1978-10-03 1978-10-03 PAL color encoder noise suppression circuit

Publications (2)

Publication Number Publication Date
JPS5547789A true JPS5547789A (en) 1980-04-04
JPS5857954B2 JPS5857954B2 (en) 1983-12-22

Family

ID=14805853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12122078A Expired JPS5857954B2 (en) 1978-10-03 1978-10-03 PAL color encoder noise suppression circuit

Country Status (1)

Country Link
JP (1) JPS5857954B2 (en)

Also Published As

Publication number Publication date
JPS5857954B2 (en) 1983-12-22

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