JPS5547774A - Phase synchronism circuit - Google Patents
Phase synchronism circuitInfo
- Publication number
- JPS5547774A JPS5547774A JP11925078A JP11925078A JPS5547774A JP S5547774 A JPS5547774 A JP S5547774A JP 11925078 A JP11925078 A JP 11925078A JP 11925078 A JP11925078 A JP 11925078A JP S5547774 A JPS5547774 A JP S5547774A
- Authority
- JP
- Japan
- Prior art keywords
- phase
- input
- lock state
- output
- vco17
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 abstract 1
- 230000010355 oscillation Effects 0.000 abstract 1
Landscapes
- Synchronizing For Television (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
PURPOSE: To establish phase synchronism circuit in which no effect is brought in lock state in phase synchronism and lock state can be taken easily in out of lock state.
CONSTITUTION: If the input Si phase is advanced and capture range is taken off, the output So of the rectangular pulse wave if fed to the input Si with the comparator 15 to obtain the outputs as S1 and S2. The former charges up a capacitor as the control pulse to advance the phase of the output So and the latter discharges C as the control pulse delaying the phase. Thus, the charge and discharge to the charge pump to C is used, the phase error is converted into analog quantity, the signal depending on the quantity is returned to the phase comparator 15 via LPF16, VCO17, and frequency divider 18, and the phase lock of the input and output signal is made to the possible range of oscillation of VCO17.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11925078A JPS5547774A (en) | 1978-09-29 | 1978-09-29 | Phase synchronism circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11925078A JPS5547774A (en) | 1978-09-29 | 1978-09-29 | Phase synchronism circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5547774A true JPS5547774A (en) | 1980-04-04 |
JPS614233B2 JPS614233B2 (en) | 1986-02-07 |
Family
ID=14756669
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11925078A Granted JPS5547774A (en) | 1978-09-29 | 1978-09-29 | Phase synchronism circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5547774A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5966270A (en) * | 1982-09-14 | 1984-04-14 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | Line tuning circuit for image display unit |
JPS60103774A (en) * | 1983-10-14 | 1985-06-08 | アールシーエー ライセンシング コーポレーシヨン | Video display unit |
JPS63286081A (en) * | 1987-05-19 | 1988-11-22 | Pioneer Electronic Corp | Method for controlling pll circuit |
EP0584824A3 (en) * | 1992-08-26 | 1994-09-14 | Nec Corp | Oscillator circuit suitable for picture-in-picture system |
-
1978
- 1978-09-29 JP JP11925078A patent/JPS5547774A/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5966270A (en) * | 1982-09-14 | 1984-04-14 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | Line tuning circuit for image display unit |
JPS60103774A (en) * | 1983-10-14 | 1985-06-08 | アールシーエー ライセンシング コーポレーシヨン | Video display unit |
JPS63286081A (en) * | 1987-05-19 | 1988-11-22 | Pioneer Electronic Corp | Method for controlling pll circuit |
EP0584824A3 (en) * | 1992-08-26 | 1994-09-14 | Nec Corp | Oscillator circuit suitable for picture-in-picture system |
Also Published As
Publication number | Publication date |
---|---|
JPS614233B2 (en) | 1986-02-07 |
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