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JPS5544984A - Peak value calculating circuit - Google Patents

Peak value calculating circuit

Info

Publication number
JPS5544984A
JPS5544984A JP11982278A JP11982278A JPS5544984A JP S5544984 A JPS5544984 A JP S5544984A JP 11982278 A JP11982278 A JP 11982278A JP 11982278 A JP11982278 A JP 11982278A JP S5544984 A JPS5544984 A JP S5544984A
Authority
JP
Japan
Prior art keywords
peak value
fed
value calculating
calculating circuit
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11982278A
Other languages
Japanese (ja)
Inventor
Koji Maeda
Tsuneo Yano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP11982278A priority Critical patent/JPS5544984A/en
Publication of JPS5544984A publication Critical patent/JPS5544984A/en
Pending legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE: To reduce the error by using the three sampling values, which are attained by continuously sampling the waves to be measured at a preset interval, thereby to determine the peak value.
CONSTITUTION: A selector 9 generates the signals 9aW9c, which are attained by continuously sampling the waves to be measured at a preset interval, and feeds them to memories 10-1W10-3. The outputs read out of the memories 10-1W10-3 are fed to a multiplier 11 and a squaring device 12, from which the resultant calculated signals 11a and 12a are fed to a subtracting circuit 13. The output signals are fed to a multiplier 14, where they are multiplied by a constant from a constant presetter 15. An evelution device 8 generates a signal indicative of the peak value.
COPYRIGHT: (C)1980,JPO&Japio
JP11982278A 1978-09-27 1978-09-27 Peak value calculating circuit Pending JPS5544984A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11982278A JPS5544984A (en) 1978-09-27 1978-09-27 Peak value calculating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11982278A JPS5544984A (en) 1978-09-27 1978-09-27 Peak value calculating circuit

Publications (1)

Publication Number Publication Date
JPS5544984A true JPS5544984A (en) 1980-03-29

Family

ID=14771097

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11982278A Pending JPS5544984A (en) 1978-09-27 1978-09-27 Peak value calculating circuit

Country Status (1)

Country Link
JP (1) JPS5544984A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5810646A (en) * 1981-07-13 1983-01-21 Moru Eng Kk Relative concentration measuring device for solution
JPS60190867A (en) * 1984-03-12 1985-09-28 Mitsubishi Electric Corp Calculation of amplitude of ac
JPS63173973A (en) * 1987-01-14 1988-07-18 Meidensha Electric Mfg Co Ltd Quantity of electricity measuring apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5810646A (en) * 1981-07-13 1983-01-21 Moru Eng Kk Relative concentration measuring device for solution
JPS60190867A (en) * 1984-03-12 1985-09-28 Mitsubishi Electric Corp Calculation of amplitude of ac
JPS63173973A (en) * 1987-01-14 1988-07-18 Meidensha Electric Mfg Co Ltd Quantity of electricity measuring apparatus

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