JPS5542318A - Cash memory control system - Google Patents
Cash memory control systemInfo
- Publication number
- JPS5542318A JPS5542318A JP11393878A JP11393878A JPS5542318A JP S5542318 A JPS5542318 A JP S5542318A JP 11393878 A JP11393878 A JP 11393878A JP 11393878 A JP11393878 A JP 11393878A JP S5542318 A JPS5542318 A JP S5542318A
- Authority
- JP
- Japan
- Prior art keywords
- error
- case
- compartment
- fault
- register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE: To perform retry process in case of an intermittent fault and disconnection of a compartment in case of a fixed fault, by adding a compartment error register and error process control circuit.
CONSTITUTION: Error process control circuit 33 refers to the logical value of output 23 of compartment error register 12 when no error is found in the past, rewriting operation for an error-occurrence block of a main memory is indicated. When a parity error is caused by an intermittent fault, the contents of a cash memory are corrected through this rewriting operation. At the same time, register 12 memorizes the hysteresis of this error. When an error in the pase is found through reference, this block is considered to has a fixed fault and a compartment including this is disconnected from the cash memory consititution. In this way, retrying process is performed leaving the hysteresis in case of the intermittent fault and the disconnection is made in case of the fixed process.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11393878A JPS5542318A (en) | 1978-09-14 | 1978-09-14 | Cash memory control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11393878A JPS5542318A (en) | 1978-09-14 | 1978-09-14 | Cash memory control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5542318A true JPS5542318A (en) | 1980-03-25 |
Family
ID=14624957
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11393878A Pending JPS5542318A (en) | 1978-09-14 | 1978-09-14 | Cash memory control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5542318A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58179982A (en) * | 1982-03-31 | 1983-10-21 | ハネウエル・インフォメーション・システムズ・インコーポレーテッド | Multi-level cash system |
JPS617959A (en) * | 1984-06-22 | 1986-01-14 | Fujitsu Ltd | Tag storage device control method |
JPS61139855A (en) * | 1984-12-11 | 1986-06-27 | Nec Corp | Buffer storage device |
-
1978
- 1978-09-14 JP JP11393878A patent/JPS5542318A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58179982A (en) * | 1982-03-31 | 1983-10-21 | ハネウエル・インフォメーション・システムズ・インコーポレーテッド | Multi-level cash system |
JPS617959A (en) * | 1984-06-22 | 1986-01-14 | Fujitsu Ltd | Tag storage device control method |
JPS61139855A (en) * | 1984-12-11 | 1986-06-27 | Nec Corp | Buffer storage device |
JPH0438015B2 (en) * | 1984-12-11 | 1992-06-23 | Nippon Electric Co |
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