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JPS5537635A - Message transmitter - Google Patents

Message transmitter

Info

Publication number
JPS5537635A
JPS5537635A JP11012078A JP11012078A JPS5537635A JP S5537635 A JPS5537635 A JP S5537635A JP 11012078 A JP11012078 A JP 11012078A JP 11012078 A JP11012078 A JP 11012078A JP S5537635 A JPS5537635 A JP S5537635A
Authority
JP
Japan
Prior art keywords
processor
register
message
common
name
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11012078A
Other languages
Japanese (ja)
Inventor
Tetsuo Omiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11012078A priority Critical patent/JPS5537635A/en
Publication of JPS5537635A publication Critical patent/JPS5537635A/en
Pending legal-status Critical Current

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  • Multi Processors (AREA)

Abstract

PURPOSE: To make it possible to interchange definitely a message by a simple constitution by providing a system, which has several processors, with a common register to which each processor can attain access.
CONSTITUTION: To common bus 100, several processors 300lW300n are connected to enable each processor to attain access to common register 400 in common. To transmit and receive a messgae among processors, a message transmission processor sets the transmission processor name, a reception processor name, and the message to transmission and reception processor name registers 401 and 402, message register 403 via control part 406. Then, the transmission processor sends an interruption signal to all processors via interruption line 200 and comparator circuit 405 make comparison with the contents of register 402; the contents of register 403 are fetched into only a processor whose name agrees, and the contents of the common register is cleared.
COPYRIGHT: (C)1980,JPO&Japio
JP11012078A 1978-09-06 1978-09-06 Message transmitter Pending JPS5537635A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11012078A JPS5537635A (en) 1978-09-06 1978-09-06 Message transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11012078A JPS5537635A (en) 1978-09-06 1978-09-06 Message transmitter

Publications (1)

Publication Number Publication Date
JPS5537635A true JPS5537635A (en) 1980-03-15

Family

ID=14527532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11012078A Pending JPS5537635A (en) 1978-09-06 1978-09-06 Message transmitter

Country Status (1)

Country Link
JP (1) JPS5537635A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58217069A (en) * 1982-06-10 1983-12-16 Fuji Xerox Co Ltd Communicating system of multi-microcomputer
JPS5914197A (en) * 1982-07-14 1984-01-25 Fuji Electric Co Ltd multiprocessor system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58217069A (en) * 1982-06-10 1983-12-16 Fuji Xerox Co Ltd Communicating system of multi-microcomputer
JPS5914197A (en) * 1982-07-14 1984-01-25 Fuji Electric Co Ltd multiprocessor system
JPS6353575B2 (en) * 1982-07-14 1988-10-24 Fuji Electric Co Ltd

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