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JPS5532216A - Automatic recording level setter - Google Patents

Automatic recording level setter

Info

Publication number
JPS5532216A
JPS5532216A JP10301878A JP10301878A JPS5532216A JP S5532216 A JPS5532216 A JP S5532216A JP 10301878 A JP10301878 A JP 10301878A JP 10301878 A JP10301878 A JP 10301878A JP S5532216 A JPS5532216 A JP S5532216A
Authority
JP
Japan
Prior art keywords
automatically
recording level
peak
peak value
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10301878A
Other languages
Japanese (ja)
Other versions
JPS6148289B2 (en
Inventor
Masao Tomita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10301878A priority Critical patent/JPS5532216A/en
Publication of JPS5532216A publication Critical patent/JPS5532216A/en
Publication of JPS6148289B2 publication Critical patent/JPS6148289B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE: To set a recording level easily, rapidly and automatically by controlling a gain control circuit by holding the peak value of an input signal in a fixed period of time via an one-touch switch.
CONSTITUTION: The peak level of an input signal from terminal 1 is detected by peak detector 9 and digitally converted by A/D converter 11 before being applied to digital counter 8 by way of AND gate 12 which is close in a pulse period when monostable multivibrator 32 outputs pulses corresponding to the one-touch operation of automatic setting switch 7. According to the cout value of this counter 8, comparator 15 makes a comparison among peak values latched in sequency by latch circuit 14 to latch the highest peak value of input levels in the fixed period of the output pulse width of matcher 32 in circuit 14; and the attenuating divider circuit formed of resistances 17, 21, 25, 29, etc., is selected via an analog switch closed corresponding to the highest peak value, thereby controlling the gain automatically. Therefore, the recording level can be set easily, rapidly and automatically through one-touch operation.
COPYRIGHT: (C)1980,JPO&Japio
JP10301878A 1978-08-23 1978-08-23 Automatic recording level setter Granted JPS5532216A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10301878A JPS5532216A (en) 1978-08-23 1978-08-23 Automatic recording level setter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10301878A JPS5532216A (en) 1978-08-23 1978-08-23 Automatic recording level setter

Publications (2)

Publication Number Publication Date
JPS5532216A true JPS5532216A (en) 1980-03-06
JPS6148289B2 JPS6148289B2 (en) 1986-10-23

Family

ID=14342899

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10301878A Granted JPS5532216A (en) 1978-08-23 1978-08-23 Automatic recording level setter

Country Status (1)

Country Link
JP (1) JPS5532216A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779721A (en) * 1980-11-06 1982-05-19 Ricoh Co Ltd Automatic gain controlling circuit
JPS57208706A (en) * 1981-06-18 1982-12-21 Sanyo Electric Co Ltd Audio muting circuit
JPS59118317U (en) * 1983-01-26 1984-08-09 日本無線株式会社 automatic gain control circuit
WO2003034588A1 (en) * 2001-10-12 2003-04-24 Mitsubishi Denki Kabushiki Kaisha Amplifier apparatus and receiver

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779721A (en) * 1980-11-06 1982-05-19 Ricoh Co Ltd Automatic gain controlling circuit
JPS57208706A (en) * 1981-06-18 1982-12-21 Sanyo Electric Co Ltd Audio muting circuit
JPS59118317U (en) * 1983-01-26 1984-08-09 日本無線株式会社 automatic gain control circuit
WO2003034588A1 (en) * 2001-10-12 2003-04-24 Mitsubishi Denki Kabushiki Kaisha Amplifier apparatus and receiver

Also Published As

Publication number Publication date
JPS6148289B2 (en) 1986-10-23

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