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JPS5520555A - Integrated circuit for information process system - Google Patents

Integrated circuit for information process system

Info

Publication number
JPS5520555A
JPS5520555A JP9318478A JP9318478A JPS5520555A JP S5520555 A JPS5520555 A JP S5520555A JP 9318478 A JP9318478 A JP 9318478A JP 9318478 A JP9318478 A JP 9318478A JP S5520555 A JPS5520555 A JP S5520555A
Authority
JP
Japan
Prior art keywords
test
signal
chip
cpu1
main memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9318478A
Other languages
Japanese (ja)
Other versions
JPS601654B2 (en
Inventor
Tsutomu Ishikawa
Noboru Onishi
Kazumitsu Matsuzawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP53093184A priority Critical patent/JPS601654B2/en
Publication of JPS5520555A publication Critical patent/JPS5520555A/en
Publication of JPS601654B2 publication Critical patent/JPS601654B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE: To omit the tester and thus to realize a big reduction of the testing cost by providing the means to test the function of the information on the same chip and simultaneously with installation of the information process system comprising the main memory and CPU onto one chip.
CONSTITUTION: System LSI is formed by installing CPU1, main memory 2, test ROM3 and test auxiliary part 4 onto one sheet of the chip. Then test mode designation signal 6 is sent into part 4, and also test result display signal 7 is drawn out of part 4. Part 4 contains oscillator 11 to generate the clock signal which prescribes the action timing of CPU1, timer 14 to produce time window signal 12 and time- over signal 13, AND gates 15W18, delay line 19, flag 20 to deliver the result display signal, time constant circuit 21 and others in order to secure an independent test. Thus an LSI suited for the electronic computer, the electronic exchange and the like can be obtained.
COPYRIGHT: (C)1980,JPO&Japio
JP53093184A 1978-08-01 1978-08-01 Information processing system integrated circuit Expired JPS601654B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53093184A JPS601654B2 (en) 1978-08-01 1978-08-01 Information processing system integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53093184A JPS601654B2 (en) 1978-08-01 1978-08-01 Information processing system integrated circuit

Publications (2)

Publication Number Publication Date
JPS5520555A true JPS5520555A (en) 1980-02-14
JPS601654B2 JPS601654B2 (en) 1985-01-16

Family

ID=14075481

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53093184A Expired JPS601654B2 (en) 1978-08-01 1978-08-01 Information processing system integrated circuit

Country Status (1)

Country Link
JP (1) JPS601654B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57105053A (en) * 1980-12-22 1982-06-30 Nec Corp Integrated circuit which has incorporated testing circuit for fault detecting circuit
JPS5866156A (en) * 1981-07-02 1983-04-20 テキサス・インスツルメンツ・インコ−ポレイテツド Microcomputer
JPS58109945A (en) * 1981-12-23 1983-06-30 Fujitsu Ltd Test method for microprocessor
JPS58219839A (en) * 1982-06-14 1983-12-21 Nec Corp Portable tester for moving machine of car telephone
JPS59146350A (en) * 1983-02-09 1984-08-22 Nec Corp Microcomputer
US5831918A (en) * 1994-02-14 1998-11-03 Micron Technology, Inc. Circuit and method for varying a period of an internal control signal during a test mode
US5991214A (en) * 1996-06-14 1999-11-23 Micron Technology, Inc. Circuit and method for varying a period of an internal control signal during a test mode

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62185666U (en) * 1986-05-20 1987-11-26

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57105053A (en) * 1980-12-22 1982-06-30 Nec Corp Integrated circuit which has incorporated testing circuit for fault detecting circuit
JPS5866156A (en) * 1981-07-02 1983-04-20 テキサス・インスツルメンツ・インコ−ポレイテツド Microcomputer
JPS58109945A (en) * 1981-12-23 1983-06-30 Fujitsu Ltd Test method for microprocessor
JPS58219839A (en) * 1982-06-14 1983-12-21 Nec Corp Portable tester for moving machine of car telephone
JPS59146350A (en) * 1983-02-09 1984-08-22 Nec Corp Microcomputer
US5831918A (en) * 1994-02-14 1998-11-03 Micron Technology, Inc. Circuit and method for varying a period of an internal control signal during a test mode
US6529426B1 (en) * 1994-02-14 2003-03-04 Micron Technology, Inc. Circuit and method for varying a period of an internal control signal during a test mode
US5991214A (en) * 1996-06-14 1999-11-23 Micron Technology, Inc. Circuit and method for varying a period of an internal control signal during a test mode

Also Published As

Publication number Publication date
JPS601654B2 (en) 1985-01-16

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