JPS55138972A - Processing method of demodulation signal - Google Patents
Processing method of demodulation signalInfo
- Publication number
- JPS55138972A JPS55138972A JP4763179A JP4763179A JPS55138972A JP S55138972 A JPS55138972 A JP S55138972A JP 4763179 A JP4763179 A JP 4763179A JP 4763179 A JP4763179 A JP 4763179A JP S55138972 A JPS55138972 A JP S55138972A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- level
- signal
- slice
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/40—Picture signal circuits
- H04N1/407—Control or modification of tonal gradation or of extreme levels, e.g. background level
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Facsimile Image Signal Circuits (AREA)
Abstract
PURPOSE:To compensate a variation of a signal level, by sampling and holding a voltage level of the demodulated signal by a keyed pulse, and making a slice voltage or a white black inverting voltage level by this hold voltage level. CONSTITUTION:A facsimile signal applied to the terminal 1 goes into the slice and white black inverting circuit 4 through the AGC circuit 2 and the demodulation circuit 3. A keyed pulse from the control circuit 11 smaples a center level of the phase signal by a switch 6, and holds it by the hold circuit 7. An output of the hold circuit 7 is provided to the changeover circuit 8, which is closed by selecting the terminal 12 or 13 by the slice from the control circuit 11 or the instruction of inversion. Thus, the terminal 12 or 13 can be selected properly in accordance with a level change of the input signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4763179A JPS55138972A (en) | 1979-04-17 | 1979-04-17 | Processing method of demodulation signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4763179A JPS55138972A (en) | 1979-04-17 | 1979-04-17 | Processing method of demodulation signal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55138972A true JPS55138972A (en) | 1980-10-30 |
| JPS6342903B2 JPS6342903B2 (en) | 1988-08-26 |
Family
ID=12780562
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4763179A Granted JPS55138972A (en) | 1979-04-17 | 1979-04-17 | Processing method of demodulation signal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55138972A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57115076A (en) * | 1981-01-09 | 1982-07-17 | Fuji Xerox Co Ltd | Synchronous detection type carrier regenerating circuit of medium velocity facsimile |
| JPS6229266A (en) * | 1985-07-29 | 1987-02-07 | Matsushita Graphic Commun Syst Inc | Automatic gain control circuit |
-
1979
- 1979-04-17 JP JP4763179A patent/JPS55138972A/en active Granted
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57115076A (en) * | 1981-01-09 | 1982-07-17 | Fuji Xerox Co Ltd | Synchronous detection type carrier regenerating circuit of medium velocity facsimile |
| JPS6348471B2 (en) * | 1981-01-09 | 1988-09-29 | Fuji Xerox Co Ltd | |
| JPS6229266A (en) * | 1985-07-29 | 1987-02-07 | Matsushita Graphic Commun Syst Inc | Automatic gain control circuit |
| JPH0365071B2 (en) * | 1985-07-29 | 1991-10-09 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6342903B2 (en) | 1988-08-26 |
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