JPS55138938A - Data collection device - Google Patents
Data collection deviceInfo
- Publication number
- JPS55138938A JPS55138938A JP4662279A JP4662279A JPS55138938A JP S55138938 A JPS55138938 A JP S55138938A JP 4662279 A JP4662279 A JP 4662279A JP 4662279 A JP4662279 A JP 4662279A JP S55138938 A JPS55138938 A JP S55138938A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- multiplexer
- signal
- circuits
- sampling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000013480 data collection Methods 0.000 title 1
- 238000005070 sampling Methods 0.000 abstract 4
- 230000000903 blocking effect Effects 0.000 abstract 3
- 239000003990 capacitor Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B14/00—Transmission systems not characterised by the medium used for transmission
- H04B14/02—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
- H04B14/04—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation using pulse code modulation
- H04B14/044—Sample and hold circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
Abstract
PURPOSE:To get rid of an output error by connecting a sampling hold (S/H) circuit to a multiplexer through an electric discharge blocking circuit. CONSTITUTION:The S/H circuit 11 consists of a switch SW1, an operation amplifier IC1 and a capacitor C1, and a signal x1 is subjected to sampling by a sampling hold signal S1 of the control circuit 14, and is input. In the S/H circuit 12, too, a signal x2 is subjected to sampling by a signal S2 and is input in the same way as the foregoing. Outputs of the S/H circuits 11, 12 are led into a multiplexer 13 through the electric discharge blocking circuits 15, 16 consisting of resistors R1, R2. And an error caused by storage capacity of the multiplexer 13 and inter-electrode capacity can be prevented by the electric discharge blocking circuits 15, 16. The multiplexer 13 changes outputs of the S/H circuits 11, 12 to TDM by the channel changeover signals M1, M2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4662279A JPS55138938A (en) | 1979-04-18 | 1979-04-18 | Data collection device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4662279A JPS55138938A (en) | 1979-04-18 | 1979-04-18 | Data collection device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55138938A true JPS55138938A (en) | 1980-10-30 |
Family
ID=12752387
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4662279A Pending JPS55138938A (en) | 1979-04-18 | 1979-04-18 | Data collection device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55138938A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6429035A (en) * | 1987-07-24 | 1989-01-31 | Yamatake Honeywell Co Ltd | Two-wire data transmission system |
JPH02183623A (en) * | 1989-01-10 | 1990-07-18 | Fujitsu Ltd | sample hold circuit |
US5317203A (en) * | 1991-04-25 | 1994-05-31 | Sharp Kabushiki Kaisha | Sample-and-hold circuit |
-
1979
- 1979-04-18 JP JP4662279A patent/JPS55138938A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6429035A (en) * | 1987-07-24 | 1989-01-31 | Yamatake Honeywell Co Ltd | Two-wire data transmission system |
JPH02183623A (en) * | 1989-01-10 | 1990-07-18 | Fujitsu Ltd | sample hold circuit |
US5317203A (en) * | 1991-04-25 | 1994-05-31 | Sharp Kabushiki Kaisha | Sample-and-hold circuit |
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