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JPS55134449A - Microprogram control unit - Google Patents

Microprogram control unit

Info

Publication number
JPS55134449A
JPS55134449A JP4100279A JP4100279A JPS55134449A JP S55134449 A JPS55134449 A JP S55134449A JP 4100279 A JP4100279 A JP 4100279A JP 4100279 A JP4100279 A JP 4100279A JP S55134449 A JPS55134449 A JP S55134449A
Authority
JP
Japan
Prior art keywords
address
instruction
selector
program
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4100279A
Other languages
Japanese (ja)
Inventor
Takashi Nishizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4100279A priority Critical patent/JPS55134449A/en
Publication of JPS55134449A publication Critical patent/JPS55134449A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To use one call instruction to call plural program processing routines on the basis of the operand address and set freely the operand address and the program address.
CONSTITUTION: Instruction register 1 is constituted by instruction code part 2 and operand address part 3 to hold an executed software instruction, and the instruction of code part 2 is applied to instruction decoder 4, and a microprogram address for the basic instruction is applied to selector 6, and the address of address part 3 is applied to selector 6 through address conversion circuit 5. The program address output from decoder 4 or circuit 5 is selected by this selector 6 under the control of selector control circuit 10 where the instruction code is input, and at a call instruction execution time, the output of circuit 5 is supplied to address register 7, and at other times, the output of decoder 4 is supplied to address register 7. Then, the operand address and the program address are set freely and are transferred to a memory unit.
COPYRIGHT: (C)1980,JPO&Japio
JP4100279A 1979-04-06 1979-04-06 Microprogram control unit Pending JPS55134449A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4100279A JPS55134449A (en) 1979-04-06 1979-04-06 Microprogram control unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4100279A JPS55134449A (en) 1979-04-06 1979-04-06 Microprogram control unit

Publications (1)

Publication Number Publication Date
JPS55134449A true JPS55134449A (en) 1980-10-20

Family

ID=12596190

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4100279A Pending JPS55134449A (en) 1979-04-06 1979-04-06 Microprogram control unit

Country Status (1)

Country Link
JP (1) JPS55134449A (en)

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