JPS55132062A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS55132062A JPS55132062A JP3967979A JP3967979A JPS55132062A JP S55132062 A JPS55132062 A JP S55132062A JP 3967979 A JP3967979 A JP 3967979A JP 3967979 A JP3967979 A JP 3967979A JP S55132062 A JPS55132062 A JP S55132062A
- Authority
- JP
- Japan
- Prior art keywords
- film
- layer
- mesa
- domain
- sio
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
PURPOSE: To obtain one transistor memory cell extremely small in area by arranging a capacity part on the top of a mesa domain and a transistor part on the area longitudinal to the mesa domain.
CONSTITUTION: An n+-layer 2 is formed on a P-Si substrate 1, an epitaxial layer 3 is provided, an SiO2 film 4 and an Si3N4 film 5 are formed selectively, and the layer 3 is etched. The layer 3 is oxidized with the film 5 as a mask, and thus the surface of the layer 6 is made almost equal to the top of a mesa domain 3a. The film 5 is removed, and a p-layer 7 is formed through ion implantation to have upper and lower layers 8, 9 separately. Next, from etching with a metallized Al 10 as a mask, there left is no Al under the canopy top of SiO2 film 4, and a groove is formed consequently. Next, the film 4 and the Al 10 are removed, a gate oxidized film 11 is formed, and a poly-Si 12 is formed selectively on the surface of the mesa domain. Then, an Al wiring layer 14 is formed through an SiO2 film 13. Now, a device area is sharply decreased, integration is improved, parasitic capacity is decreased, thereby allowing a high speed operation.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54039679A JPS5827669B2 (en) | 1979-04-02 | 1979-04-02 | semiconductor storage device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54039679A JPS5827669B2 (en) | 1979-04-02 | 1979-04-02 | semiconductor storage device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55132062A true JPS55132062A (en) | 1980-10-14 |
JPS5827669B2 JPS5827669B2 (en) | 1983-06-10 |
Family
ID=12559775
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54039679A Expired JPS5827669B2 (en) | 1979-04-02 | 1979-04-02 | semiconductor storage device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5827669B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5982761A (en) * | 1982-11-04 | 1984-05-12 | Hitachi Ltd | semiconductor memory |
JPS61294854A (en) * | 1985-06-22 | 1986-12-25 | Toshiba Corp | Semiconductor device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5186980A (en) * | 1975-01-29 | 1976-07-30 | Nippon Electric Co |
-
1979
- 1979-04-02 JP JP54039679A patent/JPS5827669B2/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5186980A (en) * | 1975-01-29 | 1976-07-30 | Nippon Electric Co |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5982761A (en) * | 1982-11-04 | 1984-05-12 | Hitachi Ltd | semiconductor memory |
JPH0342514B2 (en) * | 1982-11-04 | 1991-06-27 | ||
JPS61294854A (en) * | 1985-06-22 | 1986-12-25 | Toshiba Corp | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPS5827669B2 (en) | 1983-06-10 |
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