[go: up one dir, main page]

JPS55117330A - Adaptive differential modulation coding/decoding device - Google Patents

Adaptive differential modulation coding/decoding device

Info

Publication number
JPS55117330A
JPS55117330A JP2477079A JP2477079A JPS55117330A JP S55117330 A JPS55117330 A JP S55117330A JP 2477079 A JP2477079 A JP 2477079A JP 2477079 A JP2477079 A JP 2477079A JP S55117330 A JPS55117330 A JP S55117330A
Authority
JP
Japan
Prior art keywords
circuit
signal
step size
code
delivered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2477079A
Other languages
Japanese (ja)
Inventor
Kunihiko Niwa
Akira Yugawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2477079A priority Critical patent/JPS55117330A/en
Publication of JPS55117330A publication Critical patent/JPS55117330A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/02Delta modulation, i.e. one-bit differential modulation
    • H03M3/022Delta modulation, i.e. one-bit differential modulation with adaptable step size, e.g. adaptive delta modulation [ADM]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)

Abstract

PURPOSE:To realize the adaptive step size by varying the number of the high-speed integrating pulses in accordance with the quantized step size and via the digital circuit, thus omitting the circuit requiring the complicated accuracy and then facilitating the LSI formation. CONSTITUTION:Adaptive delta modulation code 108 is delivered from sampling/ quantizing circuit 107 in response to the rise of sampling clock pulse 114 applied to terminal 106. Then code 108 is applied to step size deciding circuit 109, and thus the step size is decided based on the past code series to deliver signal 110. Signal 110 is then applied to pulse number control circuit 201 of integrated pulse generator circuit 211, and high-speed integrated pulse number control signal 202 is delivered to the output. At the same time, high-speed clock pulse 204 is applied to terminal 203, and the logic sum is secured through AND gate 205 to signal 202. Then clock signal 206 is applied to gates 207 and 208 along with code 108, and high-speed integrated pulses 209 and 210 are delivered to the output and then applied to integrating circuit 113. Thus the fixed amount of charge and discharge is carried out in response to pulses 209 and 210.
JP2477079A 1979-03-02 1979-03-02 Adaptive differential modulation coding/decoding device Pending JPS55117330A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2477079A JPS55117330A (en) 1979-03-02 1979-03-02 Adaptive differential modulation coding/decoding device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2477079A JPS55117330A (en) 1979-03-02 1979-03-02 Adaptive differential modulation coding/decoding device

Publications (1)

Publication Number Publication Date
JPS55117330A true JPS55117330A (en) 1980-09-09

Family

ID=12147390

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2477079A Pending JPS55117330A (en) 1979-03-02 1979-03-02 Adaptive differential modulation coding/decoding device

Country Status (1)

Country Link
JP (1) JPS55117330A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62110327A (en) * 1985-11-08 1987-05-21 Matsushita Electric Ind Co Ltd Adaptive delta modulator-demodulator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62110327A (en) * 1985-11-08 1987-05-21 Matsushita Electric Ind Co Ltd Adaptive delta modulator-demodulator
JPH0362326B2 (en) * 1985-11-08 1991-09-25 Matsushita Electric Ind Co Ltd

Similar Documents

Publication Publication Date Title
JPS5745623A (en) Bidirectional input and output circuit
JPS57106227A (en) Buffer circuit
JPS55117336A (en) Logic circuit
JPS5799821A (en) Digital-to-analogue converter
JPS55117330A (en) Adaptive differential modulation coding/decoding device
JPS56145363A (en) Frequency-voltage converter
JPS54127668A (en) Analog-digital converter using josephson element
SU552715A1 (en) Pulse code demodulator for a telephone channel of a radio relay station
JPS56157123A (en) Waveform shaping circuit
JPS55139618A (en) Coding method
JPS5776627A (en) Input equipment
JPS56168171A (en) Counting type waveform shaping circuit
JPS57124953A (en) Signal transmission device
JPS57140054A (en) Ami coding circuit
JPS5563786A (en) Logic slow/fast circuit in electronic watch
JPS5533308A (en) Frequency comparator circuit
JPS5691532A (en) Logic circuit
JPS5754407A (en) Frequency demodulation circuit
JPS57135522A (en) Digital-to-analog converter
JPS5731053A (en) Remainder and parity generating circuit
JPS538085A (en) Charge coupled element
JPS5753159A (en) Phase correcting circuit
JPS54150066A (en) Encoder circuit
JPS52105738A (en) Buffer memory writen-in control system
JPS6462715A (en) Power unit